LLVM / project - FreshBSD

LLVM/project 4647802 — llvm/test/CodeGen/AMDGPU llvm.amdgcn.iglp.opt.exp.large.mir, llvm/test/CodeGen/RISCV/rvv vssub-vp.ll vssubu-vp.ll

Feb 28, 2024 by Alexey Bataev on ⎇

users/alexey-bataev/spr/ttiriscvimprove-costs-for-fixed-vector-whole-reg-extractinsert

Rebase

Created using spr 1.3.5

Delta		File
+63	-3,329	llvm/test/MC/AMDGPU/gfx11_asm_mubuf_alias.s
+65	-2,086	llvm/test/MC/AMDGPU/gfx12_asm_vbuffer_mubuf_alias.s
+2,067	-0	llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
+2,065	-0	llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
+2,055	-0	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
+2,015	-0	llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
+8,330	-5,415	2,337 files not shown
+78,214	-38,680	2,343 files

LLVM/project aa12525 — llvm/test/CodeGen/AMDGPU llvm.amdgcn.iglp.opt.exp.large.mir, llvm/test/CodeGen/RISCV/rvv vssub-vp.ll vssubu-vp.ll

Feb 28, 2024 by Alexey Bataev on ⎇

users/alexey-bataev/spr/slpadd-runtime-stride-support-for-strided-loads

Rebase

Created using spr 1.3.5

Delta		File
+63	-3,329	llvm/test/MC/AMDGPU/gfx11_asm_mubuf_alias.s
+65	-2,086	llvm/test/MC/AMDGPU/gfx12_asm_vbuffer_mubuf_alias.s
+2,067	-0	llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
+2,065	-0	llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
+2,055	-0	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
+2,015	-0	llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
+8,330	-5,415	2,333 files not shown
+78,400	-39,249	2,339 files

LLVM/project 13db21f — libc/src/math/nvptx CMakeLists.txt, lldb/third_party/Python/module/unittest2/unittest2/test test_loader.py test_case.py

Feb 28, 2024 by Florian Hahn on ⎇

users/fhahn/slp-store-vfs-in-vector

Merge remote-tracking branch 'origin/main' into users/fhahn/slp-store-vfs-in-vector

Delta		File
+63	-3,329	llvm/test/MC/AMDGPU/gfx11_asm_mubuf_alias.s
+65	-2,086	llvm/test/MC/AMDGPU/gfx12_asm_vbuffer_mubuf_alias.s
+2,055	-0	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
+0	-1,380	lldb/third_party/Python/module/unittest2/unittest2/test/test_loader.py
+0	-1,244	lldb/third_party/Python/module/unittest2/unittest2/test/test_case.py
+1,179	-0	libc/src/math/nvptx/CMakeLists.txt
+3,362	-8,039	2,040 files not shown
+55,493	-35,872	2,046 files

LLVM/project 460b9c0 — flang/lib/Lower OpenMP.cpp, llvm/test/Analysis/CostModel/X86 icmp.ll icmp-latency.ll

Feb 28, 2024 by Alexey Bataev on ⎇

users/alexey-bataev/spr/lvnfcpreselect-folding-style-before-choosing-maxing-vf-nfc

Rebase, address comments

Created using spr 1.3.5

Delta		File
+14,694	-3,895	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,610	-2,610	llvm/test/Analysis/CostModel/X86/icmp.ll
+0	-4,507	flang/lib/Lower/OpenMP.cpp
+1,970	-1,970	llvm/test/Analysis/CostModel/X86/icmp-latency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-codesize.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-sizelatency.ll
+22,814	-16,522	3,101 files not shown
+132,822	-68,160	3,107 files

LLVM/project 915fce0 — mlir/lib/Conversion/AffineToStandard AffineToStandard.cpp, mlir/test/Conversion/AffineToStandard lower-affine.mlir

Feb 28, 2024 by Rishabh Bali via GitHub on ⎇

main

[mlir][affine] Enable ConvertAffineToStandard pass to handle affine.delinearize_index Op. (#82189)

This PR, aims to enable the `ConvertAffineToStandard` to handle
`affine.dilinearize_index` Operation.

Fixes #78458

Delta		File
+54	-0	mlir/test/Conversion/AffineToStandard/lower-affine.mlir
+2	-0	mlir/lib/Conversion/AffineToStandard/AffineToStandard.cpp
+56	-0	2 files

LLVM/project b6c1174 — flang/lib/Lower OpenMP.cpp, llvm/test/Analysis/CostModel/X86 icmp.ll icmp-latency.ll

Feb 25, 2024 by NAKAMURA Takumi on ⎇

users/chapuni/mcdc/tvidx

Merge remote-tracking branch 'chapuni/main' into mcdc/tvidx

Delta		File
+14,625	-3,844	llvm/test/CodeGen/AMDGPU/bf16.ll
+10,495	-3,889	llvm/test/CodeGen/RISCV/atomic-rmw.ll
+2,610	-2,610	llvm/test/Analysis/CostModel/X86/icmp.ll
+0	-4,504	flang/lib/Lower/OpenMP.cpp
+1,970	-1,970	llvm/test/Analysis/CostModel/X86/icmp-latency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-codesize.ll
+31,470	-18,587	2,701 files not shown
+139,628	-54,187	2,707 files

LLVM/project 7c98898 — flang/lib/Lower OpenMP.cpp, llvm/test/Analysis/CostModel/X86 icmp.ll icmp-latency.ll

Feb 24, 2024 by Mingming Liu via GitHub on ⎇

users/minglotus-6/opaque

Merge branch 'main' into users/minglotus-6/opaque

Delta		File
+14,624	-3,843	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,610	-2,610	llvm/test/Analysis/CostModel/X86/icmp.ll
+0	-4,507	flang/lib/Lower/OpenMP.cpp
+1,970	-1,970	llvm/test/Analysis/CostModel/X86/icmp-latency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-sizelatency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-codesize.ll
+22,744	-16,470	1,356 files not shown
+83,117	-35,256	1,362 files

LLVM/project 08ad1bc — flang/lib/Lower OpenMP.cpp, llvm/test/Analysis/CostModel/X86 icmp.ll icmp-latency.ll

Feb 23, 2024 by Andrew Gozillon via agozillon on ⎇

users/agozillon/spr/flangopenmpmlir-extend-derived-record-type-map-support-in-flang-openmp-by-adding-some-initial-support-for-explicit-member-mapping

rebasing on recent upstream changes

Created using spr 1.3.4

Delta		File
+14,624	-3,843	llvm/test/CodeGen/AMDGPU/bf16.ll
+10,495	-3,889	llvm/test/CodeGen/RISCV/atomic-rmw.ll
+2,610	-2,610	llvm/test/Analysis/CostModel/X86/icmp.ll
+0	-4,675	flang/lib/Lower/OpenMP.cpp
+1,970	-1,970	llvm/test/Analysis/CostModel/X86/icmp-latency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-sizelatency.ll
+31,469	-18,757	2,183 files not shown
+105,750	-49,475	2,189 files

LLVM/project 6af6f01 — flang/lib/Lower OpenMP.cpp, llvm/test/Analysis/CostModel/X86 icmp.ll icmp-latency.ll

Feb 23, 2024 by Andrew Gozillon via agozillon on ⎇

users/agozillon/spr/main.flangopenmpmlir-extend-derived-record-type-map-support-in-flang-openmp-by-adding-some-initial-support-for-explicit-member-mapping

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]

Delta		File
+14,624	-3,843	llvm/test/CodeGen/AMDGPU/bf16.ll
+10,495	-3,889	llvm/test/CodeGen/RISCV/atomic-rmw.ll
+2,610	-2,610	llvm/test/Analysis/CostModel/X86/icmp.ll
+0	-4,506	flang/lib/Lower/OpenMP.cpp
+1,970	-1,970	llvm/test/Analysis/CostModel/X86/icmp-latency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-codesize.ll
+31,469	-18,588	2,183 files not shown
+105,556	-49,306	2,189 files

LLVM/project 15abc48 — flang/lib/Lower OpenMP.cpp, llvm/test/Analysis/CostModel/X86 icmp.ll icmp-latency.ll

Feb 23, 2024 by Andrew Gozillon via agozillon on ⎇

users/agozillon/spr/openmpmlir-extend-explicit-derived-type-member-mapping-support-for-openmp-dialects-lowering-to-llvm-ir

rebasing on recent upstream changes

Created using spr 1.3.4

Delta		File
+14,624	-3,843	llvm/test/CodeGen/AMDGPU/bf16.ll
+10,495	-3,889	llvm/test/CodeGen/RISCV/atomic-rmw.ll
+2,610	-2,610	llvm/test/Analysis/CostModel/X86/icmp.ll
+0	-4,506	flang/lib/Lower/OpenMP.cpp
+1,970	-1,970	llvm/test/Analysis/CostModel/X86/icmp-latency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-codesize.ll
+31,469	-18,588	2,183 files not shown
+105,556	-49,306	2,189 files

LLVM/project 10a02ee — flang/lib/Lower OpenMP.cpp, llvm/test/Analysis/CostModel/X86 icmp.ll icmp-latency.ll

Feb 23, 2024 by Andrew Gozillon via agozillon on ⎇

users/agozillon/spr/main.openmpmlir-extend-explicit-derived-type-member-mapping-support-for-openmp-dialects-lowering-to-llvm-ir

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]

Delta		File
+14,624	-3,843	llvm/test/CodeGen/AMDGPU/bf16.ll
+10,495	-3,889	llvm/test/CodeGen/RISCV/atomic-rmw.ll
+2,610	-2,610	llvm/test/Analysis/CostModel/X86/icmp.ll
+0	-4,506	flang/lib/Lower/OpenMP.cpp
+1,970	-1,970	llvm/test/Analysis/CostModel/X86/icmp-latency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-codesize.ll
+31,469	-18,588	2,183 files not shown
+105,556	-49,306	2,189 files

LLVM/project 6373d12 — flang/lib/Lower OpenMP.cpp, llvm/test/Analysis/CostModel/X86 icmp.ll icmp-latency.ll

Feb 23, 2024 by Andrew Gozillon via agozillon on ⎇

users/agozillon/spr/openmpmlir-add-new-partial_map-and-members_index-arguments-to-ompmap_info-operations-to-help-support-record-type-mapping

rebasing on recent upstream changes

Created using spr 1.3.4

Delta		File
+14,624	-3,843	llvm/test/CodeGen/AMDGPU/bf16.ll
+10,495	-3,889	llvm/test/CodeGen/RISCV/atomic-rmw.ll
+2,610	-2,610	llvm/test/Analysis/CostModel/X86/icmp.ll
+0	-4,506	flang/lib/Lower/OpenMP.cpp
+1,970	-1,970	llvm/test/Analysis/CostModel/X86/icmp-latency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-sizelatency.ll
+31,469	-18,588	2,183 files not shown
+105,556	-49,306	2,189 files

LLVM/project 2200456 — flang/lib/Lower OpenMP.cpp, llvm/test/Analysis/CostModel/X86 icmp.ll icmp-latency.ll

Feb 23, 2024 by Andrew Gozillon via agozillon on ⎇

users/agozillon/spr/main.openmpmlir-add-new-partial_map-and-members_index-arguments-to-ompmap_info-operations-to-help-support-record-type-mapping

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]

Delta		File
+14,624	-3,843	llvm/test/CodeGen/AMDGPU/bf16.ll
+10,495	-3,889	llvm/test/CodeGen/RISCV/atomic-rmw.ll
+2,610	-2,610	llvm/test/Analysis/CostModel/X86/icmp.ll
+0	-4,506	flang/lib/Lower/OpenMP.cpp
+1,970	-1,970	llvm/test/Analysis/CostModel/X86/icmp-latency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-codesize.ll
+31,469	-18,588	2,183 files not shown
+105,556	-49,306	2,189 files

LLVM/project 014f470 — flang/lib/Lower OpenMP.cpp, llvm/test/Analysis/CostModel/X86 icmp.ll icmp-latency.ll

Feb 23, 2024 by Andrew Gozillon via agozillon on ⎇

users/agozillon/spr/flangopenmp-explicit-member-mapping-fortran-offload-tests-now-supported-through-extending-derived-type-map-support-in-flang-and-the-openmp-dialect

rebasing on recent upstream changes

Created using spr 1.3.4

Delta		File
+14,624	-3,843	llvm/test/CodeGen/AMDGPU/bf16.ll
+10,495	-3,889	llvm/test/CodeGen/RISCV/atomic-rmw.ll
+2,610	-2,610	llvm/test/Analysis/CostModel/X86/icmp.ll
+0	-4,506	flang/lib/Lower/OpenMP.cpp
+1,970	-1,970	llvm/test/Analysis/CostModel/X86/icmp-latency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-sizelatency.ll
+31,469	-18,588	2,183 files not shown
+105,556	-49,306	2,189 files

LLVM/project 07713b8 — flang/lib/Lower OpenMP.cpp, llvm/test/Analysis/CostModel/X86 icmp.ll icmp-latency.ll

Feb 22, 2024 by Alexey Bataev on ⎇

users/alexey-bataev/spr/ttiriscvimprove-costs-for-fixed-vector-whole-reg-extractinsert

Rebase

Created using spr 1.3.5

Delta		File
+14,624	-3,843	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,610	-2,610	llvm/test/Analysis/CostModel/X86/icmp.ll
+0	-4,507	flang/lib/Lower/OpenMP.cpp
+1,970	-1,970	llvm/test/Analysis/CostModel/X86/icmp-latency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-codesize.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-sizelatency.ll
+22,744	-16,470	769 files not shown
+51,731	-30,309	775 files

LLVM/project f742206 — flang/lib/Lower OpenMP.cpp, llvm/test/Analysis/CostModel/X86 icmp.ll icmp-latency.ll

Feb 22, 2024 by Alexey Bataev on ⎇

users/alexey-bataev/spr/slpadd-runtime-stride-support-for-strided-loads

Rebase

Created using spr 1.3.5

Delta		File
+14,624	-3,843	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,610	-2,610	llvm/test/Analysis/CostModel/X86/icmp.ll
+0	-4,507	flang/lib/Lower/OpenMP.cpp
+1,970	-1,970	llvm/test/Analysis/CostModel/X86/icmp-latency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-sizelatency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-codesize.ll
+22,744	-16,470	993 files not shown
+55,776	-31,121	999 files

LLVM/project 8975407 — flang/lib/Lower OpenMP.cpp, llvm/test/Analysis/CostModel/X86 icmp.ll icmp-latency.ll

Feb 22, 2024 by Alexey Bataev on ⎇

users/alexey-bataev/spr/slpimprove-minbitwidth-analysis

Fix formatting

Created using spr 1.3.5

Delta		File
+14,624	-3,843	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,610	-2,610	llvm/test/Analysis/CostModel/X86/icmp.ll
+0	-4,507	flang/lib/Lower/OpenMP.cpp
+1,970	-1,970	llvm/test/Analysis/CostModel/X86/icmp-latency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-sizelatency.ll
+1,770	-1,770	llvm/test/Analysis/CostModel/X86/icmp-codesize.ll
+22,744	-16,470	708 files not shown
+49,419	-29,314	714 files

LLVM/project 7d41ba4 — lldb/test/API/python_api/sbdata TestSBData.py, llvm/test/CodeGen/AMDGPU bf16.ll vector_shuffle.packed.ll

Feb 22, 2024 by mingmingl on ⎇

users/minglotus-6/spr/placeholder

fixup

Delta		File
+3,378	-4,278	llvm/test/CodeGen/AMDGPU/bf16.ll
+192	-192	llvm/unittests/Transforms/Vectorize/VPlanSlpTest.cpp
+29	-52	mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-resize.mlir
+32	-42	llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
+36	-31	lldb/test/API/python_api/sbdata/TestSBData.py
+21	-40	mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
+3,688	-4,635	152 files not shown
+4,305	-5,234	158 files

LLVM/project d0757f4 — lldb/test/API/python_api/sbdata TestSBData.py, llvm/test/CodeGen/AMDGPU bf16.ll vector_shuffle.packed.ll

Feb 21, 2024 by mingmingl on ⎇

users/minglotus-6/typeprofrawformat

Merge branch 'main' into users/minglotus-6/typeprofrawformat

Delta		File
+3,378	-4,278	llvm/test/CodeGen/AMDGPU/bf16.ll
+192	-192	llvm/unittests/Transforms/Vectorize/VPlanSlpTest.cpp
+29	-52	mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-resize.mlir
+32	-42	llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
+36	-31	lldb/test/API/python_api/sbdata/TestSBData.py
+21	-40	mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
+3,688	-4,635	151 files not shown
+4,305	-5,234	157 files

LLVM/project 57b4229 — mlir/lib/Conversion/TosaToLinalg TosaToLinalg.cpp, mlir/test/Conversion/AffineToStandard lower-affine.mlir

Feb 21, 2024 by Florian Hahn on ⎇

users/fhahn/vplan-uniform-scalar-lanes

Merge remote-tracking branch 'origin/main' into users/fhahn/vplan-uniform-scalar-lanes

Delta		File
+29	-52	mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-resize.mlir
+21	-40	mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
+15	-29	mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
+16	-26	mlir/test/Conversion/AffineToStandard/lower-affine.mlir
+5	-15	mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
+6	-12	mlir/test/Conversion/ShapeToStandard/shape-to-standard.mlir
+92	-174	11 files not shown
+128	-230	17 files

LLVM/project d4fd202 — mlir/lib/Conversion/TosaToLinalg TosaToLinalg.cpp, mlir/test/Conversion/AffineToStandard lower-affine.mlir

Feb 21, 2024 by mlevesquedion via GitHub on ⎇

main

[mlir] Use arith max or min ops instead of cmp + select (#82178)

I believe the semantics should be the same, but this saves 1 op and simplifies the code.

For example, the following two instructions:

```
%2 = cmp sgt %0, %1
%3 = select %2, %0, %1
```

Are equivalent to:

```
%2 = maxsi %0 %1
```

Delta		File
+29	-52	mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-resize.mlir
+21	-40	mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
+15	-29	mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
+16	-26	mlir/test/Conversion/AffineToStandard/lower-affine.mlir
+5	-15	mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
+6	-12	mlir/test/Conversion/ShapeToStandard/shape-to-standard.mlir
+92	-174	7 files not shown
+112	-217	13 files

LLVM/project 27fb627 — llvm/test/CodeGen/AMDGPU bf16.ll, llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll

Jan 10, 2024 by Andrés Villegas on ⎇

users/avillega/sanitizer_symbolizer-add-end-to-end-test-for-symbolizer-markup

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5

Delta		File
+0	-38,349	llvm/test/MC/X86/intel-syntax-avx512.s
+38,349	-0	llvm/test/MC/X86/avx512-intel.s
+27,218	-219	llvm/test/CodeGen/AMDGPU/bf16.ll
+0	-24,622	llvm/test/MC/X86/x86-64-avx512f_vl.s
+24,622	-0	llvm/test/MC/X86/avx512f_vl-att.s
+11,620	-11,712	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+101,809	-74,902	7,543 files not shown
+669,800	-419,054	7,549 files

LLVM/project a0ec54f — llvm/test/CodeGen/AMDGPU bf16.ll, llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll

Jan 10, 2024 by martinboehme via Andrés Villegas on ⎇

users/avillega/main.sanitizer_symbolizer-add-end-to-end-test-for-symbolizer-markup

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.5

[skip ci]

Delta		File
+38,349	-0	llvm/test/MC/X86/avx512-intel.s
+0	-38,349	llvm/test/MC/X86/intel-syntax-avx512.s
+27,218	-219	llvm/test/CodeGen/AMDGPU/bf16.ll
+0	-24,622	llvm/test/MC/X86/x86-64-avx512f_vl.s
+24,622	-0	llvm/test/MC/X86/avx512f_vl-att.s
+11,620	-11,712	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+101,809	-74,902	7,541 files not shown
+669,707	-419,054	7,547 files

LLVM/project 69eacf8 — llvm/test/CodeGen/AMDGPU bf16.ll, llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll

Jan 3, 2024 by Andrés Villegas on ⎇

users/avillega/clangd-migrate-command-line-option-parsin-to-opttable

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5

Delta		File
+0	-38,349	llvm/test/MC/X86/intel-syntax-avx512.s
+38,349	-0	llvm/test/MC/X86/avx512-intel.s
+29,608	-9	llvm/test/CodeGen/AMDGPU/bf16.ll
+24,622	-0	llvm/test/MC/X86/avx512f_vl-att.s
+0	-24,622	llvm/test/MC/X86/x86-64-avx512f_vl.s
+11,620	-11,712	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+104,199	-74,692	5,701 files not shown
+568,373	-357,320	5,707 files

LLVM/project f7907be — llvm/test/CodeGen/AMDGPU bf16.ll, llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll

Jan 3, 2024 by Andrés Villegas on ⎇

users/avillega/main.clangd-migrate-command-line-option-parsin-to-opttable

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.5

[skip ci]

Delta		File
+0	-38,349	llvm/test/MC/X86/intel-syntax-avx512.s
+38,349	-0	llvm/test/MC/X86/avx512-intel.s
+29,608	-9	llvm/test/CodeGen/AMDGPU/bf16.ll
+24,622	-0	llvm/test/MC/X86/avx512f_vl-att.s
+0	-24,622	llvm/test/MC/X86/x86-64-avx512f_vl.s
+11,620	-11,712	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+104,199	-74,692	5,699 files not shown
+567,586	-356,818	5,705 files

LLVM/project cba0ef6 — clang/test/CodeGen/aarch64-sme2-intrinsics acle_sme2_read.c, libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print locale-specific_form.pass.cpp

Dec 20, 2023 by Andrés Villegas on ⎇

users/avillega/clangd-refactor-check-to-have-more-explicit-cli-args

Rebase main

Created using spr 1.3.5

Delta		File
+16,550	-9	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,042	-2,028	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+3,093	-0	llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
+2,200	-0	libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/locale-specific_form.pass.cpp
+1,880	-0	clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_read.c
+1,644	-0	llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
+27,409	-2,037	986 files not shown
+54,753	-12,969	992 files

LLVM/project c9d534a — clang/test/CodeGen/aarch64-sme2-intrinsics acle_sme2_read.c, libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print locale-specific_form.pass.cpp

Dec 20, 2023 by Craig Topper via Andrés Villegas on ⎇

users/avillega/main.clangd-refactor-check-to-have-more-explicit-cli-args

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5

[skip ci]

Delta		File
+16,550	-9	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,042	-2,028	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+3,093	-0	llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
+2,200	-0	libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/locale-specific_form.pass.cpp
+1,880	-0	clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_read.c
+1,644	-0	llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
+27,409	-2,037	986 files not shown
+54,753	-12,969	992 files

LLVM/project 10056c8 — mlir/include/mlir/Dialect/SCF/IR SCFOps.td, mlir/lib/Conversion/AffineToStandard AffineToStandard.cpp

Dec 20, 2023 by Matthias Springer via GitHub on ⎇

main

[mlir][SCF] `scf.parallel`: Make reductions part of the terminator (#75314)

This commit makes reductions part of the terminator. Instead of
`scf.yield`, `scf.reduce` now terminates the body of `scf.parallel` ops.
`scf.reduce` may contain an arbitrary number of reductions, with one
region per reduction.

Example:
```mlir
%init = arith.constant 0.0 : f32
%r:2 = scf.parallel (%iv) = (%lb) to (%ub) step (%step) init (%init, %init)
    -> f32, f32 {
  %elem_to_reduce1 = load %buffer1[%iv] : memref<100xf32>
  %elem_to_reduce2 = load %buffer2[%iv] : memref<100xf32>
  scf.reduce(%elem_to_reduce1, %elem_to_reduce2 : f32, f32) {
    ^bb0(%lhs : f32, %rhs: f32):
      %res = arith.addf %lhs, %rhs : f32
      scf.reduce.return %res : f32
  }, {

    [11 lines not shown]

Delta		File
+67	-86	mlir/lib/Dialect/SCF/IR/SCF.cpp
+64	-51	mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
+56	-45	mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
+33	-33	mlir/test/Dialect/SCF/parallel-loop-fusion.mlir
+18	-17	mlir/test/Dialect/SCF/invalid.mlir
+16	-11	mlir/lib/Conversion/AffineToStandard/AffineToStandard.cpp
+254	-243	20 files not shown
+338	-334	26 files

LLVM/project 23b794f — mlir/include/mlir/Dialect/Affine/IR AffineOps.td AffineOps.h, mlir/lib/Dialect/Affine/IR AffineOps.cpp

Sep 29, 2023 by Matthias Springer via GitHub on ⎇

main

[mlir][Affine][NFC] Define AffineForOp operands in ODS (#67694)

Modernize affine dialect ops: Define LB, UB, step and inits as operands
in TableGen.

Delta		File
+56	-78	mlir/lib/Dialect/Affine/IR/AffineOps.cpp
+14	-43	mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
+22	-21	mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
+10	-9	mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
+9	-3	mlir/test/Dialect/Affine/ops.mlir
+3	-3	mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
+114	-157	6 files not shown
+122	-164	12 files

LLVM/project 3bd7a9b — mlir/include/mlir/Dialect/SCF/IR SCFOps.td, mlir/include/mlir/Interfaces LoopLikeInterface.td

Sep 21, 2023 by Matthias Springer via GitHub on ⎇

main

[mlir][Interfaces] `LoopLikeOpInterface`:  Add helpers to get region iter_args and inits (#66925)

`AffineForOp::getInitOperands` is renamed to `getInits` to be consistent
with MLIR operand getter naming conventions. ("get" + operand name)

Delta		File
+25	-0	mlir/include/mlir/Interfaces/LoopLikeInterface.td
+8	-8	mlir/lib/Dialect/Affine/IR/AffineOps.cpp
+3	-3	mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
+3	-3	mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
+6	-0	mlir/lib/Dialect/SCF/IR/SCF.cpp
+3	-3	mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
+48	-17	5 files not shown
+53	-21	11 files