LLVM/project e9c561ellvm/lib/Target/RISCV RISCVGISel.td, llvm/test/CodeGen/RISCV/GlobalISel atomic-load-store.ll

[RISCV][GISel] Add atomic load/store test. Add additional atomic load/store isel patterns."
DeltaFile
+1,678-0llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store.ll
+13-0llvm/lib/Target/RISCV/RISCVGISel.td
+1,691-02 files

LLVM/project dbe159bmlir/lib/IR BuiltinTypes.cpp BuiltinAttributes.cpp, mlir/test/Dialect/Affine memref-stride-calculation.mlir

[mlir] [IR] Allow zero strides in StridedLayoutAttr (#116463)

Disabling memrefs with a stride of 0 was intended to prevent internal
aliasing, but this does not address all cases : internal aliasing can
still occur when the stride is less than the shape.

On the other hand, a stride of 0 can be very useful in certain
scenarios. For example, in architectures that support multi-dimensional
DMA, we can use memref::copy with a stride of 0 to achieve a broadcast
effect.

This commit removes the restriction that strides in memrefs cannot be 0.
DeltaFile
+0-14mlir/lib/IR/BuiltinTypes.cpp
+0-10mlir/test/Dialect/MemRef/invalid.mlir
+0-5mlir/test/IR/invalid-builtin-types.mlir
+0-4mlir/lib/IR/BuiltinAttributes.cpp
+2-2mlir/test/Dialect/Affine/memref-stride-calculation.mlir
+2-355 files

LLVM/project 42775a4llvm/lib/Transforms/Instrumentation ControlHeightReduction.cpp

[ControlHeightReduction] Add assert to avoid underflow (#116339)

`NumCHRedBranches - 1` is used later, we should add an assertion to make
sure it will not underflow.
DeltaFile
+1-0llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
+1-01 files

LLVM/project 3291372mlir/include/mlir/Dialect/Vector/IR VectorOps.td, mlir/lib/Dialect/Vector/IR VectorOps.cpp

[mlir][vector] Fix 0-d vector transfer mask inference (#116526)

When inferring the mask of a transfer operation that results in a single `i1` element, 
we could represent it using either `vector<i1>` or vector<1xi1>. To avoid type mismatches,
this PR updates the mask inference logic to consistently generate `vector<1xi1>` for
these cases. We can enable 0-D masks if they are needed in the future.

See: https://github.com/llvm/llvm-project/issues/116197
DeltaFile
+15-0mlir/test/Dialect/Vector/invalid.mlir
+14-0mlir/test/Dialect/Vector/ops.mlir
+5-0mlir/lib/Dialect/Vector/IR/VectorOps.cpp
+3-1mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
+37-14 files

LLVM/project 197fb27llvm/test/Transforms/SLPVectorizer materialize-vector-of-consts.ll

[AArch64][NFC] NFC for const vector as Instruction operand (#116790)

Current cost-modelling does not take into account cost of materializing
const vector. This results in some cases, as the test shows, being
vectorized but this may not always be profitable. Future patch will try
to address this issue.
DeltaFile
+100-0llvm/test/Transforms/SLPVectorizer/materialize-vector-of-consts.ll
+100-01 files

LLVM/project c4be13cclang/docs ReleaseNotes.rst, clang/include/clang/Basic Attr.td

Revert "[TargetVersion] Only enable on RISC-V and AArch64" (#117110)

Reverts llvm/llvm-project#115991

Due to build fail
https://lab.llvm.org/buildbot/#/builders/66/builds/6511
DeltaFile
+0-4clang/test/Sema/attr-target-version-unsupported.c
+0-2clang/docs/ReleaseNotes.rst
+1-1clang/include/clang/Basic/Attr.td
+1-73 files

LLVM/project 75b8f98llvm/lib/Transforms/Vectorize SLPVectorizer.cpp

[SLP] NFC. Change the comment to match the code execution. (#116022)

Make code execute like the comment will modify many tests and affect the
performance. As a result, we change the comment instead of the code.
DeltaFile
+1-1llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+1-11 files

LLVM/project 922282eclang/docs ReleaseNotes.rst, clang/include/clang/Basic Attr.td

[TargetVersion] Only enable on RISC-V and AArch64 (#115991)

Address https://github.com/llvm/llvm-project/issues/115000. 

This patch constrains the target_version feature to work only on RISC-V
and AArch64 to prevent crashes in Clang.

---------

Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
DeltaFile
+4-0clang/test/Sema/attr-target-version-unsupported.c
+2-0clang/docs/ReleaseNotes.rst
+1-1clang/include/clang/Basic/Attr.td
+7-13 files

LLVM/project a432f11llvm/include/llvm/ExecutionEngine/JITLink aarch64.h, llvm/lib/ExecutionEngine/JITLink aarch64.cpp MachO_arm64.cpp

[JITLink][arm64] Support arm64e JIT'd code (initially enabled for MachO only).

Adds two new JITLink passes to create and populate a pointer-signing function
that can be called via an allocation-action attached to the LinkGraph:

* createEmptyPointerSigningFunction creates a pointer signing function in a
custome section, reserving sufficient space for the signing code. It should
be run as a post-prune pass (to ensure that memory is reserved prior to
allocation).
* lowerPointer64AuthEdgesToSigningFunction pass populates the signing function
by walking the graph, decoding the ptrauth info (encoded in the edge addend) and
writing an instruction sequence to sign all ptrauth fixup locations.

rdar://61956998
DeltaFile
+276-0llvm/lib/ExecutionEngine/JITLink/aarch64.cpp
+158-0llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ptrauth-globals.s
+53-0llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
+33-3llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
+520-34 files

LLVM/project 4d6e691clang/test/CodeGen math-libcalls-tbaa-indirect-args.c, clang/test/CodeGen/SystemZ zos-mixed-ptr-sizes.c

Add the initializes attribute inference (#117104)

reland https://github.com/llvm/llvm-project/pull/97373 after fixing
clang tests.

Confirmed with "ninja check-llvm" and "ninja check-clang"
DeltaFile
+572-0llvm/test/Transforms/FunctionAttrs/initializes.ll
+326-3llvm/lib/Transforms/IPO/FunctionAttrs.cpp
+52-52llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
+7-7clang/test/CodeGen/SystemZ/zos-mixed-ptr-sizes.c
+6-6clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c
+5-5llvm/test/Transforms/FunctionAttrs/argmemonly.ll
+968-7327 files not shown
+1,022-12733 files

LLVM/project ceb3dc6llvm/lib/Target/AMDGPU VOP3PInstructions.td SIInstrInfo.td

AMDGPU: Create InstrMapping from VGPR MFMA to equivalent AGPR instruction

This provides infrastructure for a future optimization.
DeltaFile
+10-5llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+9-0llvm/lib/Target/AMDGPU/SIInstrInfo.td
+5-0llvm/lib/Target/AMDGPU/SIInstrInfo.h
+24-53 files

LLVM/project 69cc3f0utils/bazel/llvm-project-overlay/mlir BUILD.bazel

Add mlir-query bazel rules (#116063)

I noticed there's no bazel query for `mlir-query`, unlike the other MLIR
tools, so adding one.
DeltaFile
+58-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+58-01 files

LLVM/project 79c850dllvm/lib/Target/LoongArch LoongArchExpandPseudoInsts.cpp, llvm/test/CodeGen/LoongArch psabi-restricted-scheduling.ll tls-models.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5-bogner
DeltaFile
+20-20llvm/test/CodeGen/LoongArch/psabi-restricted-scheduling.ll
+10-10llvm/test/CodeGen/LoongArch/tls-models.ll
+10-10llvm/test/CodeGen/LoongArch/machinelicm-address-pseudos.ll
+5-5llvm/test/CodeGen/LoongArch/code-models.ll
+4-4llvm/test/CodeGen/LoongArch/expand-adjacency.ll
+1-1llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
+50-506 files

LLVM/project 5d38e6eflang/test/HLFIR bufferize-workshare.fir, flang/test/Integration/OpenMP workshare-scalar-array-mul.f90 workshare-axpy.f90

[flang] Introduce hlfir.elemental lowerings to omp.workshare_loop_nest (#104748)

This patch adds parallelization support for the following expression in OpenMP
workshare constructs:

* Elemental procedures in array expressions

(reapplied with linking fix)
DeltaFile
+162-0flang/test/Transforms/OpenMP/should-use-workshare-lowering.mlir
+65-0flang/test/Integration/OpenMP/workshare-scalar-array-mul.f90
+57-0flang/test/Integration/OpenMP/workshare-axpy.f90
+57-0flang/test/HLFIR/bufferize-workshare.fir
+45-0flang/test/Integration/OpenMP/workshare-scalar-array-assign.f90
+34-0flang/test/Integration/OpenMP/workshare-array-array-assign.f90
+420-03 files not shown
+431-49 files

LLVM/project 036cd27llvm/unittests/TargetParser RISCVISAInfoTest.cpp

[RISCV] Fix typo in RISCVISAInfoTest.cpp. NFC.

ExtsRV32G -> ExtsRV64G.
DeltaFile
+2-2llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+2-21 files

LLVM/project 5abf65amlir/lib/Transforms/Utils DialectConversion.cpp

[mlir][Transforms][NFC] Dialect conversion: Remove "finalize" phase (#116934)

The dialect conversion driver has three phases:
- **Create** `IRRewrite` objects as the IR is traversed.
- **Finalize** `IRRewrite` objects. During this phase, source
materializations for mismatching value types are created. (E.g., when
`Value` is replaced with a `Value` of different type, but there is a
user of the original value that was not modified because it is already
legal.)
- **Commit** `IRRewrite` objects. During this phase, all remaining IR
modifications are materialized. In particular, SSA values are actually
being replaced during this phase.

This commit removes the "finalize" phase. This simplifies the code base
a bit and avoids one traversal over the `IRRewrite` stack. Source
materializations are now built during the "commit" phase, right before
an SSA value is being replaced.

This commit also removes the "inverse mapping" of the conversion value

    [15 lines not shown]
DeltaFile
+72-112mlir/lib/Transforms/Utils/DialectConversion.cpp
+72-1121 files

LLVM/project cbc7802mlir/include/mlir/Dialect/Bufferization/Transforms Passes.td Bufferize.h, mlir/lib/Dialect/Bufferization/Transforms Bufferize.cpp

[mlir][bufferization] Remove `finalizing-bufferize` pass (#114154)

The dialect conversion-based bufferization passes have been migrated to
One-Shot Bufferize about two years ago. To clean up the code base, this
commit removes the `finalizing-bufferize` pass, one of the few remaining
parts of the old infrastructure. Most bufferization passes have already
been removed.

Note for LLVM integration: If you depend on this pass, migrate to
One-Shot Bufferize or copy the pass to your codebase.

Depends on #114152.
DeltaFile
+0-95mlir/test/Dialect/Bufferization/Transforms/finalizing-bufferize.mlir
+0-75mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
+0-16mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
+0-6mlir/include/mlir/Dialect/Bufferization/Transforms/Bufferize.h
+0-4mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
+0-2mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
+0-1986 files

LLVM/project 258a5d4llvm/include/llvm/ExecutionEngine/Orc/Shared ExecutorAddress.h

[ORC][arm64e] Add PAC signing/stripping support to ExecutorAddr toPtr/fromPtr.

On arm64e, uses the "wrap" and "unwrap" operations introduced in f14cb494a34d to
sign and strip pointers by default. Signing / striping can be overriden at the
toPtr / fromPtr callside by passing an explicit wrap / unwrap operation.
DeltaFile
+31-0llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h
+31-01 files

LLVM/project 4056d93mlir/lib/Transforms/Utils DialectConversion.cpp

Revert "[mlir][Transforms][NFC] Dialect conversion: Remove "finalize" phase" (#117094)

Reverts llvm/llvm-project#116934

This commit broke the build.
DeltaFile
+112-72mlir/lib/Transforms/Utils/DialectConversion.cpp
+112-721 files

LLVM/project 1beeac3mlir/include/mlir/Dialect/Bufferization/Transforms Passes.td Bufferize.h, mlir/lib/Dialect/Bufferization/Transforms Bufferize.cpp

[mlir][bufferization] Remove `finalizing-bufferize` pass

The dialect conversion-based bufferization passes have been migrated to One-Shot Bufferize about two years ago. To clean up the code base, this commit removes the `finalizing-bufferize` pass, one of the few remaining parts of the old infrastructure. Most bufferization passes have already been removed.

Note for LLVM integration: If you depend on this pass, migrate to One-Shot Bufferize or copy the pass to your codebase.

Depends on #114152.
DeltaFile
+0-95mlir/test/Dialect/Bufferization/Transforms/finalizing-bufferize.mlir
+0-75mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
+0-16mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
+0-6mlir/include/mlir/Dialect/Bufferization/Transforms/Bufferize.h
+0-4mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
+0-2mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
+0-1986 files

LLVM/project aa65473mlir/lib/Transforms/Utils DialectConversion.cpp

[mlir][Transforms][NFC] Dialect conversion: Remove "finalize" phase (#116934)

The dialect conversion driver has three phases:
- **Create** `IRRewrite` objects as the IR is traversed.
- **Finalize** `IRRewrite` objects. During this phase, source
materializations for mismatching value types are created. (E.g., when
`Value` is replaced with a `Value` of different type, but there is a
user of the original value that was not modified because it is already
legal.)
- **Commit** `IRRewrite` objects. During this phase, all remaining IR
modifications are materialized. In particular, SSA values are actually
being replaced during this phase.

This commit removes the "finalize" phase. This simplifies the code base
a bit and avoids one traversal over the `IRRewrite` stack. Source
materializations are now built during the "commit" phase, right before
an SSA value is being replaced.

This commit also removes the "inverse mapping" of the conversion value

    [15 lines not shown]
DeltaFile
+72-112mlir/lib/Transforms/Utils/DialectConversion.cpp
+72-1121 files

LLVM/project 7b5b019llvm/lib/Target/X86 X86InstrInfo.cpp X86MachineFunctionInfo.cpp, llvm/test/CodeGen/X86 pr114265.mir

Revert "[X86] Recognize POP/ADD/SUB modifying rsp in getSPAdjust. (#114265) (#117089)

This reverts commit 6fb7cdff3d90c565b87a253ff7dbd36319879111.
DeltaFile
+0-94llvm/test/CodeGen/X86/pr114265.mir
+2-29llvm/lib/Target/X86/X86InstrInfo.cpp
+1-5llvm/lib/Target/X86/X86MachineFunctionInfo.cpp
+0-4llvm/lib/Target/X86/X86MachineFunctionInfo.h
+3-1324 files

LLVM/project 1de9bc1lld/MachO DriverUtils.cpp InputFiles.cpp, lld/test/MachO allowable-client.s

[lld][MachO] Respect dylibs linked with `-allowable_client` (#114638)

ld64.lld would previously allow you to link against dylibs linked with
`-allowable_client`, even if the client's name does not match any
allowed client.

This change fixes that. See #114146 for related discussion. 

The test binary `liballowable_client.dylib` was created on macOS with:

echo | clang -xc - -dynamiclib -mmacosx-version-min=10.11 -arch x86_64
-Wl,-allowable_client,allowed -o lib/liballowable_client.dylib
DeltaFile
+74-0lld/test/MachO/allowable-client.s
+20-0lld/MachO/DriverUtils.cpp
+14-0lld/MachO/InputFiles.cpp
+9-0lld/MachO/Driver.cpp
+1-2lld/MachO/Options.td
+1-0lld/MachO/Config.h
+119-22 files not shown
+120-28 files

LLVM/project fe33bd0llvm/test/Analysis/MemoryDependenceAnalysis load-size-cache.ll

[test] Precommit test for #116936
DeltaFile
+65-0llvm/test/Analysis/MemoryDependenceAnalysis/load-size-cache.ll
+65-01 files

LLVM/project c86899dclang/include/clang/Basic AttrDocs.td Attr.td, clang/lib/CodeGen CGDecl.cpp

[clang] Add support for `__declspec(no_init_all)` (#116847)

In MSVC, when `/d1initall` is enabled, `__declspec(no_init_all)` can be
applied to a type to suppress auto-initialization for all instances of
that type or to a function to suppress auto-initialization for all
locals within that function.

This change does the same for Clang, except that it applies to the
`-ftrivial-auto-var-init` flag instead.

NOTE: I did not add a Clang-specific spelling for this but would be
happy to make a followup PR if folks are interested in that.
DeltaFile
+59-0clang/test/CodeGenCXX/auto-var-init-attr.cpp
+12-10clang/lib/CodeGen/CGDecl.cpp
+12-0clang/include/clang/Basic/AttrDocs.td
+7-0clang/include/clang/Basic/Attr.td
+90-104 files

LLVM/project cf5c86blibcxx/test/std/experimental/simd/simd.class simd_copy.pass.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.4
DeltaFile
+1-0libcxx/test/std/experimental/simd/simd.class/simd_copy.pass.cpp
+1-01 files

LLVM/project 97e3f62libc CMakeLists.txt, libc/newhdrgen yaml_to_classes.py

Revert "[libc] support fully OOT build (#101287)"

This reverts commit c0efcc08e67325dc813d9acb7cc3560fd444fc8f.
DeltaFile
+13-18libc/CMakeLists.txt
+0-0libc/newhdrgen/yaml_to_classes.py
+13-182 files

LLVM/project 905e831llvm/lib/Target/AMDGPU AMDGPUCodeGenPrepare.cpp, llvm/test/CodeGen/AMDGPU urem64.ll udiv64.ll

Revert "[AMDGPU] prevent shrinking udiv/urem if either operand is in (SignedMax,UnsignedMax] (#116733)"

This reverts commit b8e1d4dbea8905e48d51a70bf75cb8fababa4a60.

Causes failures on the `libc` test suite https://lab.llvm.org/buildbot/#/builders/73/builds/8871
DeltaFile
+242-162llvm/test/CodeGen/AMDGPU/urem64.ll
+241-82llvm/test/CodeGen/AMDGPU/udiv64.ll
+4-115llvm/test/CodeGen/AMDGPU/bypass-div.ll
+0-98llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
+11-27llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
+498-4845 files

LLVM/project 53a6a11clang/test/CodeGen embed-bitcode-marker-with-nonzero-as.c, llvm/lib/Bitcode/Writer BitcodeWriter.cpp

[LLVM][NFC] Use `used`'s element type if available (#116804)

When embedding, if `compiler.used` exists, we should re-use it's element
type instead of blindly assuming it's an unqualified pointer.
DeltaFile
+8-0clang/test/CodeGen/embed-bitcode-marker-with-nonzero-as.c
+2-1llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+10-12 files

LLVM/project a8ed51blibc/fuzzing/__support freelist_heap_fuzz.cpp, libc/src/__support freelist.h freetrie.h

Merge branch 'main' into users/kparzysz/spr/m04-order-schedule
DeltaFile
+181-61libc/src/__support/freelist.h
+0-237libc/src/__support/freetrie.h
+0-227libc/fuzzing/__support/freelist_heap_fuzz.cpp
+200-0llvm/test/CodeGen/AArch64/cfi-fixup-multi-section.mir
+143-28libc/test/src/__support/freelist_test.cpp
+85-68libc/src/__support/freelist_heap.h
+609-62151 files not shown
+1,215-1,56957 files