LLVM/project bb86c5dllvm/lib/Transforms/Vectorize VPlanAnalysis.cpp VPlanRecipes.cpp

[VPlan] Use inferScalarType in VPInstruction::ResumePhi codegen (NFC).

Use VPlan-based type analysis to retrieve type of phi node. Also adds
missing type inference for ResumePhi and ComputeReductionResult opcodes.
DeltaFile
+6-0llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
+1-1llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+7-12 files

LLVM/project 93c2577llvm/utils/gn/secondary/libcxx/include BUILD.gn

[gn build] Port b9a2658a3e8b
DeltaFile
+891-0llvm/utils/gn/secondary/libcxx/include/BUILD.gn
+891-01 files

LLVM/project f77152dclang-tools-extra/clang-tidy/modernize UseUsingCheck.cpp UseUsingCheck.h, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] use specified type verbatim in modernize-use-using fix (#113837)

Previously, the implementation used the printed type, which contains
expanded
macro arguments, deletes comments, and removes function argument names 
from the alias declaration. Instead, this check can be more surgical and
use the
actual written type verbatim.

Fixes #33760
Fixes #37846
Fixes #41685
Fixes #83568
Fixes #95716
Fixes #97009
DeltaFile
+60-15clang-tools-extra/clang-tidy/modernize/UseUsingCheck.cpp
+59-5clang-tools-extra/test/clang-tidy/checkers/modernize/use-using.cpp
+3-0clang-tools-extra/docs/ReleaseNotes.rst
+1-0clang-tools-extra/clang-tidy/modernize/UseUsingCheck.h
+123-204 files

LLVM/project b9a2658libcxx/include CMakeLists.txt, libcxx/include/__cxx03 module.modulemap CMakeLists.txt

[libc++][C++03] Use `__cxx03/` headers in C++03 mode (#109002)

This patch implements the forwarding to frozen C++03 headers as
discussed in
https://discourse.llvm.org/t/rfc-freezing-c-03-headers-in-libc. In the
RFC, we initially proposed selecting the right headers from the Clang
driver, however consensus seemed to steer towards handling this in the
library itself. This patch implements that direction.

At a high level, the changes basically amount to making each public
header look like this:

```
// inside <vector>
#ifdef _LIBCPP_CXX03_LANG
#  include <__cxx03/vector>
#else
  // normal <vector> content
#endif

    [4 lines not shown]
DeltaFile
+989-989libcxx/include/__cxx03/module.modulemap
+0-1,092libcxx/include/__cxx03/CMakeLists.txt
+1,020-0libcxx/include/CMakeLists.txt
+80-0libcxx/include/__cxx03/__configuration/config_site_shim.h
+26-6libcxx/test/support/test_macros.h
+9-4libcxx/utils/generate_feature_test_macro_components.py
+2,124-2,091241 files not shown
+2,889-2,506247 files

LLVM/project c361fd5llvm/lib/Target/RISCV/AsmParser RISCVAsmParser.cpp, llvm/test/MC/RISCV rv32i-only-valid.s rv32c-only-valid.s

[RISCV] Fix More RV32 Signed Immediates (#120658)

DeltaFile
+44-1llvm/test/MC/RISCV/rv32i-only-valid.s
+28-0llvm/test/MC/RISCV/rv32c-only-valid.s
+18-0llvm/test/MC/RISCV/rv32zcibop-valid-rv32.s
+5-3llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+95-44 files

LLVM/project 95c5386llvm/lib/Target/RISCV RISCVInstrInfoXwch.td RISCVInstrInfo.td, llvm/lib/Target/RISCV/MCTargetDesc RISCVMCCodeEmitter.cpp RISCVBaseInfo.h

[RISCV][NFCI] Rationalize Immediate Definitions (#120718)

DeltaFile
+12-30llvm/lib/Target/RISCV/RISCVInstrInfoXwch.td
+17-25llvm/lib/Target/RISCV/RISCVInstrInfo.td
+9-9llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+5-5llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
+1-7llvm/lib/Target/RISCV/RISCVInstrInfoV.td
+3-3llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+47-791 files not shown
+48-837 files

LLVM/project e138f78llvm/lib/Target/RISCV RISCVInstrInfoXSf.td

[RISCV] Remove unnecessary 'let BaseInstr' from Xsfvcp pseudoinstructions. NFC

These are identical to the RISCVVPseudo base class.
DeltaFile
+0-6llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
+0-61 files

LLVM/project f06756fllvm/lib/Target/AArch64/Utils AArch64BaseInfo.h, llvm/lib/Target/ARM/Utils ARMBaseInfo.h

Store sysreg names in-line with their descriptors. (#119157)

This wastes some disk space, because we have to size the arrays for
the maximum possible length. However, it eliminates dynamic relocations
from the SysRegsList arrays.
DeltaFile
+3-3llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+2-2llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
+1-1llvm/lib/Target/ARM/Utils/ARMBaseInfo.h
+6-63 files

LLVM/project 7a38445llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer DependencyGraph.h, llvm/lib/Transforms/Vectorize/SandboxVectorizer DependencyGraph.cpp

[SandboxVec][DAG] Register move instr callback (#120146)

This patch implements the move instruction notifier for the DAG.
Whenever an instruction moves the notifier will maintain the DAG.
DeltaFile
+46-0llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
+34-1llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
+18-0llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
+98-13 files

LLVM/project 665d79fllvm/lib/Target/AArch64/GISel AArch64LegalizerInfo.cpp, llvm/test/CodeGen/AArch64/GlobalISel legalize-cmp.mir

[AArch64][GlobalISel] Implement G_ICMP support for oversize pointer vectors.
DeltaFile
+65-0llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
+5-2llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+70-22 files

LLVM/project cbf931ellvm/include/llvm/Target TargetSelectionDAG.td, llvm/include/llvm/Target/GlobalISel SelectionDAGCompat.td

[TableGen][GlobalISel] Add GINodeEquiv for sdivrem/udivrem (#120819)

These nodes are not currently used in DAG patterns. Their GlobalISel
equivalents are primarily useful for testing TableGen backend, as they
produce two results. (There doesn't seem to be other such nodes.)
DeltaFile
+2-2llvm/include/llvm/Target/TargetSelectionDAG.td
+2-0llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
+4-22 files

LLVM/project 5cd4274mlir/lib/Bindings/Python ExecutionEngineModule.cpp DialectQuant.cpp

[mlir python] Port in-tree dialects to nanobind. (#119924)

This is a companion to #118583, although it can be landed independently
because since #117922 dialects do not have to use the same Python
binding framework as the Python core code.

This PR ports all of the in-tree dialect and pass extensions to
nanobind, with the exception of those that remain for testing pybind11
support.

This PR also:
* removes CollectDiagnosticsToStringScope from NanobindAdaptors.h. This
was overlooked in a previous PR and it is duplicated in Diagnostics.h.

---------

Co-authored-by: Jacques Pienaar <jpienaar at google.com>
DeltaFile
+43-42mlir/lib/Bindings/Python/ExecutionEngineModule.cpp
+39-40mlir/lib/Bindings/Python/DialectQuant.cpp
+29-25mlir/lib/Bindings/Python/DialectLLVM.cpp
+23-25mlir/lib/Bindings/Python/DialectTransform.cpp
+22-23mlir/lib/Bindings/Python/DialectSparseTensor.cpp
+22-22mlir/lib/Bindings/Python/DialectGPU.cpp
+178-17729 files not shown
+357-36035 files

LLVM/project 559f080llvm/utils/gn/secondary/llvm/lib/CodeGen BUILD.gn, llvm/utils/gn/secondary/llvm/unittests/CodeGen BUILD.gn

[gn build] Port d328d4106139
DeltaFile
+0-1llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
+0-1llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
+0-22 files

LLVM/project d328d41llvm/include/llvm/CodeGen DroppedVariableStatsMIR.h MachineFunctionPass.h, llvm/lib/CodeGen DroppedVariableStatsMIR.cpp MachineFunctionPass.cpp

Revert "Add a pass to collect dropped var stats for MIR (#120780)"

This reverts commit 3bf91ad2a9c75dd045961e45fdd830fd7b7a5455.
(llvmorg-20-init-16123-g3bf91ad2a9c7)

`llvm/CodeGen` should not depend on `llvm/Passes`.
DeltaFile
+0-1,080llvm/unittests/CodeGen/DroppedVariableStatsMIRTest.cpp
+0-77llvm/lib/CodeGen/DroppedVariableStatsMIR.cpp
+0-70llvm/include/llvm/CodeGen/DroppedVariableStatsMIR.h
+1-14llvm/lib/CodeGen/MachineFunctionPass.cpp
+0-2llvm/include/llvm/CodeGen/MachineFunctionPass.h
+0-1llvm/lib/CodeGen/CMakeLists.txt
+1-1,2441 files not shown
+1-1,2457 files

LLVM/project 9ae92d7llvm/include/llvm/CodeGen SelectionDAGNodes.h SelectionDAGTargetInfo.h, llvm/lib/Target/PowerPC PPCISelLowering.h

[SelectionDAG] Virtualize isTargetStrictFPOpcode / isTargetMemoryOpcode (#119969)

With this change, targets are no longer required to put memory / strict-fp opcodes after special
`ISD::FIRST_TARGET_MEMORY_OPCODE`/`ISD::FIRST_TARGET_STRICTFP_OPCODE` markers.
This will also allow autogenerating `isTargetMemoryOpcode`/`isTargetStrictFPOpcode (#119709).

Pull Request: https://github.com/llvm/llvm-project/pull/119969
DeltaFile
+18-19llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+4-25llvm/include/llvm/CodeGen/SelectionDAGNodes.h
+12-11llvm/lib/Target/PowerPC/PPCISelLowering.h
+6-9llvm/lib/Target/X86/X86ISelLowering.h
+13-0llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h
+6-7llvm/lib/Target/RISCV/RISCVISelLowering.h
+59-7136 files not shown
+234-12242 files

LLVM/project a7cd660llvm/test/TableGen GlobalISelEmitter-optional-def.td, llvm/utils/TableGen GlobalISelEmitter.cpp

[TableGen][GISel] Learn to import patterns with optional defs (#120470)

The number of skipped patterns reduces for ARM from 4278 to 4257.
This is the only in-tree target that makes use of OptionalDefOperand.

Pull Request: https://github.com/llvm/llvm-project/pull/120470
DeltaFile
+56-0llvm/test/TableGen/GlobalISelEmitter-optional-def.td
+25-6llvm/utils/TableGen/GlobalISelEmitter.cpp
+6-3llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
+4-2llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
+91-114 files

LLVM/project 09712f4llvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU swdev503538-move-to-valu-stack-srd-physreg.ll

AMDGPU: Fix assert on physreg MUBUF rsrc operand

The stack case uses a physical register and should not ordinarily
reach here, but strange things happen at -O0. The testcase still
errors because we do not yet attempt to handle arbitrary dynamic
sized allocas yet.

Fixes: SWDEV-503538
DeltaFile
+23-0llvm/test/CodeGen/AMDGPU/swdev503538-move-to-valu-stack-srd-physreg.ll
+1-2llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+24-22 files

LLVM/project 3bbd53clibc/config/gpu entrypoints.txt headers.txt, libc/hdrgen/yaml/gpu rpc.yaml

[libc] Remove old RPC host call extension for GPU (#120800)

Summary:
This was originally a hacked together function that served to just
implement some features for OpenMP. That has been moved into OpenMP
itself now that we have exported RPC properly. This can now be deleted.
DeltaFile
+0-23libc/hdrgen/yaml/gpu/rpc.yaml
+0-18libc/include/gpu/rpc.h.def
+0-13libc/include/CMakeLists.txt
+0-3libc/config/gpu/entrypoints.txt
+0-3libc/config/gpu/headers.txt
+0-1libc/src/__support/RPC/CMakeLists.txt
+0-616 files

LLVM/project 4451431llvm/utils/TableGen GlobalISelEmitter.cpp

[TableGen][GISel] Delete unused `Src` arguments (NFC) (#120445)

The last uses were removed in #120332 and #120426.

When emitting renderers, we shouldn't look at the source DAG at all. The
required information is provided by the destination DAG and by the
instructions referenced in that DAG. Sometimes, we do want to know if a
result was referenced in the source DAG; this can be checked by calling
`RuleMatcher::hasOperand`. Any other use of the source DAG when emitting
renderers is likely an error.

Pull Request: https://github.com/llvm/llvm-project/pull/120445
DeltaFile
+66-66llvm/utils/TableGen/GlobalISelEmitter.cpp
+66-661 files

LLVM/project 6ecedb0libc/test/src/math/smoke CanonicalizeTest.h FModTest.h

[libc] Make a couple of math smoke tests more robust. (#120808)

Make sure to clear out all FE_ALL_EXCEPT bits both before and after
invoking function under test -- otherwise the very first check for the
exception bits in the unit test may fail due to bits set prior to test
invocation.
DeltaFile
+1-0libc/test/src/math/smoke/CanonicalizeTest.h
+1-0libc/test/src/math/smoke/FModTest.h
+2-02 files

LLVM/project 96839a4llvm/lib/DebugInfo/GSYM GsymCreator.cpp, llvm/test/tools/llvm-gsymutil/ARM_AArch64 macho-gsym-merged-callsites-dsym.yaml

[llvm-gsymutil] Ensure stable ordering of merged functions (#120796)

Previously, the test
`llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-merged-callsites-dsym.yaml`
[was disabled](https://github.com/llvm/llvm-project/pull/119957/files)
due to failing on Linux.

The issue is that the merged functions appear in a different order in
the final produced `gSYM`.
To ensure deterministic ordering of merged functions, we change the
sorting of functions to use the `stable_sort` algorithm. Before merged
functions, this was not an issue as the address is used as a comparator
in the sorting algorithm so there was no chance of two functions testing
as identical according to the comparator.

Confirmed that test now passes locally with
`-DLLVM_ENABLE_EXPENSIVE_CHECKS=ON`.
DeltaFile
+2-2llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
+0-4llvm/test/tools/llvm-gsymutil/ARM_AArch64/macho-gsym-merged-callsites-dsym.yaml
+2-62 files

LLVM/project adf0c81llvm/include/llvm/Transforms/Instrumentation MemProfiler.h, llvm/lib/Transforms/Instrumentation MemProfiler.cpp

[memprof] Undrift MemProf profile even when some frames are missing (#120500)

This patch makes the MemProf undrifting process a little more lenient.
Consider an inlined call hierarchy:

  foo -> bar -> ::new

If bar tail-calls ::new, the profile appears to indicate that foo
directly calls ::new.  This is a problem because the perceived call
hierarchy in the profile looks different from what we can obtain from
the inline stack in the IR.

Recall that undrifting works by constructing and comparing a list of
direct calls from the profile and that from the IR.  This patch
modifies the construction of the latter.  Specifically, if foo calls
bar in the IR, but bar is missing the profile, we pretend that foo
directly calls some heap allocation function.  We apply this
transformation only in the inline stack leading to some heap
allocation function.
DeltaFile
+92-0llvm/test/Transforms/PGOProfile/memprof_undrift_missing_leaf.ll
+28-9llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
+5-2llvm/include/llvm/Transforms/Instrumentation/MemProfiler.h
+125-113 files

LLVM/project e5de2a2clang-tools-extra/clang-tidy ClangTidy.cpp ClangTidy.h, clang-tools-extra/clang-tidy/tool ClangTidyMain.cpp

[clang-tidy][NFC] extract options verify to separately function (#120768)

DeltaFile
+21-15clang-tools-extra/clang-tidy/tool/ClangTidyMain.cpp
+4-4clang-tools-extra/clang-tidy/ClangTidy.cpp
+3-3clang-tools-extra/clang-tidy/ClangTidy.h
+28-223 files

LLVM/project c1e7e45clang/docs ThreadSafetyAnalysis.rst, clang/lib/Analysis ThreadSafety.cpp

Thread Safety Analysis: Support passing scoped locks between functions with appropriate annotations (#110523)

This is helpful when multiple functions operate on the same
capabilities, but we still want to use scoped lockable types for
readability and exception safety.
- Introduce support for thread safety annotations on function parameters
  marked with the 'scoped_lockable' attribute.
- Add semantic checks for annotated function parameters, ensuring
  correct usage.
- Enhance the analysis to recognize and handle parameters annotated for
  thread safety, extending the scope of analysis to track these across
  function boundries.
- Verify that the underlying mutexes of function arguments match the
  expectations set by the annotations.

Limitation: This does not work when the attribute arguments are class
members, because attributes on function parameters are parsed
differently from attributes on functions.
DeltaFile
+372-0clang/test/SemaCXX/warn-thread-safety-analysis.cpp
+165-10clang/lib/Analysis/ThreadSafety.cpp
+46-4clang/docs/ThreadSafetyAnalysis.rst
+30-12clang/test/SemaCXX/warn-thread-safety-parsing.cpp
+41-0clang/lib/Sema/SemaDeclAttr.cpp
+40-0clang/lib/Sema/AnalysisBasedWarnings.cpp
+694-264 files not shown
+774-3010 files

LLVM/project 415cfafflang/include/flang/Runtime/CUDA descriptor.h, flang/lib/Optimizer/Transforms CUFOpConversion.cpp

[flang][cuda][NFC] Fix type in CUFFreeDescriptor (#120799)

DeltaFile
+1-1flang/unittests/Runtime/CUDA/AllocatorCUF.cpp
+1-1flang/include/flang/Runtime/CUDA/descriptor.h
+1-1flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
+1-1flang/runtime/CUDA/descriptor.cpp
+1-1flang/test/Fir/CUDA/cuda-allocate.fir
+5-55 files

LLVM/project 0e921f4llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV/rvv fixed-vectors-shuffle-exact-vlen.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5
DeltaFile
+52-41llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+42-49llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
+94-902 files

LLVM/project 78ab771llvm/test/CodeGen/RISCV/rvv fixed-vectors-shuffle-exact-vlen.ll

[RISCV][NFC]Add more test for shuffles with exact vlen, NFC
DeltaFile
+146-10llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
+146-101 files

LLVM/project 994457fclang/docs ReleaseNotes.rst, clang/include/clang/Driver Options.td

[Clang-CL][DXC] Expose -fdiagnostic-color= to clang-cl and clang-dxc (#120644)

Exposing `-fdiagnostic-color=` to clang-cl and clang-dxc.
`-fcolor-diagnostics` and `-fno-color-diagnostics` are already allowed
in both of these and `-fdiagnostics-color=` allows one additional value,
`auto`.

I've added the tests for clang-cl to `cl-options.c` as per the comments
in the issue linked below. I couldn't finding a suitable existing file
to add the clang-dxc tests to so I've created a new one.

Resolves #119184
DeltaFile
+8-0clang/test/Driver/dxc_options.hlsl
+0-4clang/test/Driver/unknown-arg-drivermodes.test
+3-0clang/docs/ReleaseNotes.rst
+1-1clang/include/clang/Driver/Options.td
+1-0clang/test/Driver/cl-options.c
+13-55 files

LLVM/project e650ac1flang/include/flang/Runtime/CUDA descriptor.h, flang/lib/Optimizer/CodeGen CodeGen.cpp

[flang][cuda][NFC] Fix typo in CUFAllocDescriptor (#120797)

Missing `r` in the function name.
DeltaFile
+8-8flang/test/Fir/CUDA/cuda-code-gen.mlir
+6-6flang/lib/Optimizer/CodeGen/CodeGen.cpp
+1-1flang/runtime/CUDA/descriptor.cpp
+1-1flang/test/Fir/CUDA/cuda-allocate.fir
+1-1flang/unittests/Runtime/CUDA/AllocatorCUF.cpp
+1-1flang/include/flang/Runtime/CUDA/descriptor.h
+18-181 files not shown
+19-197 files

LLVM/project 81831efflang/lib/Optimizer/CodeGen CodeGen.cpp, flang/test/Fir/CUDA cuda-code-gen.mlir

[flang][cuda] Correctly allocate descriptor in managed memory when reboxing (#120795)

Reboxing might create a new in memory descriptor. If this one was
allocate with managed memory, allocate the new one in managed memory as
well.
DeltaFile
+70-0flang/test/Fir/CUDA/cuda-code-gen.mlir
+8-3flang/lib/Optimizer/CodeGen/CodeGen.cpp
+78-32 files