LLVM/project b3a2208mlir/lib/Dialect/SCF/Transforms ForallToFor.cpp ParallelLoopFusion.cpp

[mlir] Apply ClangTidy fixes.

- Prefer to check empty() instead of size() == 0.
- Remove unused using declarations.
DeltaFile
+0-2mlir/lib/Dialect/SCF/Transforms/ForallToFor.cpp
+1-1mlir/lib/Dialect/SCF/Transforms/ParallelLoopFusion.cpp
+1-32 files

LLVM/project de1f5b9llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 pr47629.ll pr47629-inseltpoison.ll

[SLP]Vectorize gathered loads

Final gather/buildvector nodes may have scalar loads, which are not
vectorized (since they are part of the gather nodes) but may form full
vector loads, being combined. This patch walks over all gather nodes,
"gathering" and sorting gathered scalar loads and then tries to build
vector loads, which later are reshuffled between the gather nodes.
It allows later to add support for segmented loads (kind of AOS to SOA
load kind for RISC-V RVV) and may help with the removal of the alternat
e opcodes support.
Currently, alternate nodes may depend on each other because of the
consecutive loads between their operands. Because of that we cannot
simply remove alternate vectorization. But this approach may help to
remove most of the stuff for it, since we'll be able to vectorize loads
in between lanes.

Metric: size..text, AVX512

Program                                                                                                                                                size..text

    [241 lines not shown]
DeltaFile
+550-32llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+129-141llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
+129-141llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
+54-108llvm/test/Transforms/SLPVectorizer/X86/pr48879-sroa.ll
+33-66llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
+29-51llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
+924-53915 files not shown
+1,083-74921 files

LLVM/project b1339abllvm/test/Transforms/InstCombine assume-align.ll

[InstCombine] Add tests for folding align assumes into load metadata.
DeltaFile
+50-1llvm/test/Transforms/InstCombine/assume-align.ll
+50-11 files

LLVM/project ce73407llvm/include/llvm/CodeGen MachineInstr.h

Fix MachineInstr::uses() doc. NFC. (#108950)

Uses was documented as register uses, which is not true.
DeltaFile
+1-1llvm/include/llvm/CodeGen/MachineInstr.h
+1-11 files

LLVM/project d38ec13lld/ELF Driver.cpp, llvm/test/Analysis/ValueTracking recurrence-knownbits.ll

Rebase, fix comment, remove extra parens

Created using spr 1.3.5
DeltaFile
+544-977llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
+1,437-0llvm/test/CodeGen/AArch64/vecreduce-bitext.ll
+661-0llvm/test/CodeGen/AArch64/aarch64-sve2-faminmax.ll
+254-0llvm/test/Analysis/ValueTracking/recurrence-knownbits.ll
+129-123lld/ELF/Driver.cpp
+233-0llvm/test/CodeGen/SPIRV/debug-info/debug-type-basic.ll
+3,258-1,100184 files not shown
+6,153-2,544190 files

FreeNAS/freenas 3be5b66src/middlewared/middlewared/api/v25_04_0 failover_reboot.py system_reboot.py, src/middlewared/middlewared/plugins/failover_ reboot.py

`system.reboot.info`
DeltaFile
+88-71src/middlewared/middlewared/plugins/failover_/reboot.py
+76-0src/middlewared/middlewared/plugins/system/reboot.py
+10-31src/middlewared/middlewared/plugins/security/update.py
+15-16src/middlewared/middlewared/api/v25_04_0/failover_reboot.py
+4-27src/middlewared/middlewared/scripts/configure_fips.py
+18-0src/middlewared/middlewared/api/v25_04_0/system_reboot.py
+211-1453 files not shown
+214-1629 files

FreeBSD/ports a9e4a19security/vault distinfo Makefile

security/vault: Update version 1.14.4=>1.14.5

Changelog: https://github.com/hashicorp/vault/releases/tag/v1.14.5
DeltaFile
+17-17security/vault/distinfo
+2-2security/vault/Makefile
+19-192 files

FreeBSD/ports ba6b84bsysutils/httm distinfo Makefile

sysutils/httm: Update version 0.41.1=>0.41.2

Changelog: https://github.com/kimono-koans/httm/releases/tag/0.41.2
DeltaFile
+3-3sysutils/httm/distinfo
+1-1sysutils/httm/Makefile
+4-42 files

FreeBSD/ports 691f2c8devel/py-tox distinfo Makefile

devel/py-tox: Update version 4.14.0=>4.14.1

Changelog: https://github.com/tox-dev/tox/releases/tag/4.14.1
DeltaFile
+3-3devel/py-tox/distinfo
+1-1devel/py-tox/Makefile
+4-42 files

FreeBSD/ports f357d9awww/minio distinfo Makefile

www/minio: Update version 2024-01-13T07-53-03Z=>2024-01-16T16-07-38Z

Changelog: https://github.com/minio/minio/releases/tag/RELEASE.2024-01-16T16-07-38Z
DeltaFile
+5-5www/minio/distinfo
+2-2www/minio/Makefile
+7-72 files

FreeBSD/ports 54dc693emulators/qemu-devel distinfo Makefile

emulators/qemu-devel: Update version 8.3.0.20240731=>9.1.0.20240831
DeltaFile
+15-15emulators/qemu-devel/distinfo
+3-3emulators/qemu-devel/Makefile
+18-182 files

FreeBSD/ports 1376ee2devel/gammaray Makefile pkg-plist

devel/gammaray: Fix build

- Add missing dependency
DeltaFile
+7-4devel/gammaray/Makefile
+6-0devel/gammaray/pkg-plist
+13-42 files

FreeBSD/ports f70e4a0net-im/py-slack-sdk distinfo Makefile

net-im/py-slack-sdk: Update version 3.32.0=>3.33.0

Changelog: https://github.com/slackapi/python-slack-sdk/releases/tag/v3.33.0
DeltaFile
+3-3net-im/py-slack-sdk/distinfo
+1-1net-im/py-slack-sdk/Makefile
+4-42 files

FreeBSD/ports c2e1a2adatabases/freetds-devel distinfo Makefile

databases/freetds-devel: Update version 1.4.244=>1.4.246
DeltaFile
+3-3databases/freetds-devel/distinfo
+1-1databases/freetds-devel/Makefile
+4-42 files

LLVM/project b222ec1llvm/test/CodeGen/X86 vector-reduce-add-mask.ll

[X86] vector-reduce-add-mask.ll - regenerate vpmulhuw asm comments. NFC
DeltaFile
+3-3llvm/test/CodeGen/X86/vector-reduce-add-mask.ll
+3-31 files

LLVM/project 742e04dllvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 zero_extend_vector_inreg.ll

[X86] combineConcatVectorOps - handle *_EXTEND nodes
DeltaFile
+17-0llvm/lib/Target/X86/X86ISelLowering.cpp
+1-4llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll
+18-42 files

LLVM/project 8411214llvm/test/CodeGen/AArch64 vecreduce-bitext.ll

[AArch64] Tests for vecreduce.or(sext(x)), with or/and/xor and sext/zext. NFC
DeltaFile
+1,437-0llvm/test/CodeGen/AArch64/vecreduce-bitext.ll
+1,437-01 files

LLVM/project 72901fellvm/lib/Target/AArch64 AArch64MIPeepholeOpt.cpp AArch64LoadStoreOptimizer.cpp, llvm/test/CodeGen/AArch64 trunc-to-tbl.ll addsub-24bit-imm.mir

[AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (#106968)

Using the LSR or LSL aliases of UBFM can be faster on some CPUs, so it
is worth changing 64 bit UBFM instructions, that are equivalent to 32
bit LSR/LSL operations, to 32 bit variants.

This change folds the following patterns:
* If `Imms == 31` and `Immr <= Imms`:
   `UBFMXri %0, Immr, Imms`  ->  `UBFMWri %0.sub_32, Immr, Imms`
* If `Immr == Imms + 33`:
   `UBFMXri %0, Immr, Imms`  ->  `UBFMWri %0.sub_32, Immr - 32, Imms`
DeltaFile
+58-0llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
+8-8llvm/test/CodeGen/AArch64/trunc-to-tbl.ll
+8-4llvm/test/CodeGen/AArch64/addsub-24bit-imm.mir
+11-0llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+9-1llvm/test/CodeGen/AArch64/bitfield-extract.ll
+4-4llvm/test/CodeGen/AArch64/arm64-ld-from-st.ll
+98-177 files not shown
+115-2613 files

LLVM/project 20c5432flang/lib/Semantics resolve-directives.cpp, flang/test/Semantics/OpenMP private-assoc.f90

[flang][Semantics][OpenMP] Don't privatise associate names (#108856)

The associate name preserves the association with the selector
established in the associate statement. Therefore it is incorrect to
change the data-sharing attribute of the name.

Closes #58041
DeltaFile
+32-0flang/test/Semantics/OpenMP/private-assoc.f90
+10-3flang/lib/Semantics/resolve-directives.cpp
+42-32 files

NetBSD/src Gb7HgLNbin/date date.1

   Note that the order in which the -u and -d options are given matters.
VersionDeltaFile
1.55+22-2bin/date/date.1
+22-21 files

LLVM/project b6f72fcflang/lib/Optimizer/Transforms AddDebugInfo.cpp, flang/test/Transforms debug-fn-info.fir

[flang][debug] Generate correct subroutine type. (#108605)

We pass a list of types when creating a subroutine type. The first one
is supposed to be return type and the rest are the argument types. A
subroutine does not have a return type so an argument type could be
confused as a return type. To fix this, if there is no return type, we
generate a null type as a place holder.

Fixes #108564.
DeltaFile
+9-1flang/test/Transforms/debug-fn-info.fir
+3-0flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
+12-12 files

LLVM/project b1d7694clang/lib/Basic/Targets AArch64.cpp, clang/test/Preprocessor init-aarch64.c aarch64-target-features.c

[AArch64] Add missing ACLE predefined macros and update __ARM_ACLE. (#108857)

Adds __ARM_ACLE_VERSION and __FUNCTION_MULTI_VERSIONING_SUPPORT_LEVEL
as defined here https://github.com/ARM-software/acle/pull/301 and
here https://github.com/ARM-software/acle/pull/302.

Also bumps __ARM_ACLE to 202420.
DeltaFile
+12-3clang/test/Preprocessor/init-aarch64.c
+8-1clang/lib/Basic/Targets/AArch64.cpp
+0-1clang/test/Preprocessor/aarch64-target-features.c
+20-53 files

LLVM/project 1603f99libcxx/include/__algorithm simd_utils.h mismatch.h

[libc++] Explicitly convert to masks in SIMD code (#107983)

This makes it clearer when we use masks and avoids MSan complaining.
DeltaFile
+50-27libcxx/include/__algorithm/simd_utils.h
+4-4libcxx/include/__algorithm/mismatch.h
+54-312 files

LLVM/project 1fc288bflang/lib/Optimizer/Transforms DebugTypeGenerator.cpp, flang/test/Transforms debug-assumed-size-array.fir

[flang][debug] Handle lower bound in assumed size arrays. (#108523)

Fixes #108411
DeltaFile
+12-9flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
+3-2flang/test/Transforms/debug-assumed-size-array.fir
+15-112 files

LLVM/project bc8a5d1llvm/include/llvm/IR Intrinsics.td, llvm/test/Transforms/SimplifyCFG patchpoint-invalid-sink.ll

[Patchpoint] Add immarg attributes to patchpoint arguments (#97276)

DeltaFile
+35-0llvm/test/Transforms/SimplifyCFG/patchpoint-invalid-sink.ll
+31-0llvm/test/Verifier/intrinsic-immarg.ll
+6-2llvm/include/llvm/IR/Intrinsics.td
+72-23 files

LLVM/project 731a683llvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp

[AMDGPU] Refine operand iterators in the SIInsertWaitcnts. NFCI. (#108884)

DeltaFile
+79-108llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+79-1081 files

NetBSD/src lgNBcQUbin/date date.c

   isleap() is not a standard function/macro, so if none of the include
   files have defined a macro of that name, define it ourselves.
VersionDeltaFile
1.67+6-2bin/date/date.c
+6-21 files

LLVM/project 83220e9llvm/utils/gn/secondary/lld/test BUILD.gn

[gn build] Add llvm-cgdata dependency to check-lld

This ports f4763b3d2.
DeltaFile
+1-0llvm/utils/gn/secondary/lld/test/BUILD.gn
+1-01 files

Linux/linux a940d9a. MAINTAINERS, arch/arm/mach-davinci cpuidle.c cpuidle.h

Merge tag 'soc-arm-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC ARM platform updates from Arnd Bergmann:
 "Most of these updates are for removing dead code on the Samsung S3C,
  NXP i.MX, TI OMAP and TI DaVinci platforms, though this appears to be
  a coincidence.

  There are also cleanups for the Marvell Orion family and the Arm
  integrator series and a Kconfig change for Broadcom"

* tag 'soc-arm-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: dove: Drop a write-only variable
  ARM: orion5x: Switch to new sys-off handler API
  ARM: mvebu: Warn about memory chunks too small for DDR training
  ARM: imx: Annotate imx7d_enet_init() as __init
  ARM: OMAP1: Remove unused declarations in arch/arm/mach-omap1/pm.h
  ARM: s3c: remove unused s3c2410_cpu_suspend() declaration
  ARM: s3c: remove unused declarations for s3c6400
  ARM: s3c: Remove unused s3c_init_uart_irqs() declaration

    [9 lines not shown]
DeltaFile
+0-99arch/arm/mach-davinci/cpuidle.c
+0-22arch/arm/mach-imx/mach-imx6sx.c
+0-15arch/arm/mach-davinci/cpuidle.h
+0-13arch/arm/mach-omap1/omap-dma.c
+0-11arch/arm/mach-s3c/s3c64xx.h
+10-0MAINTAINERS
+10-16021 files not shown
+29-19127 files

LLVM/project 64cfce9mlir/docs/Dialects/OpenMPDialect _index.md

[MLIR][OpenMP][Docs] Document operand structures (NFC) (#108824)

This patch updates the OpenMP dialect top-level documentation to
describe the operand structures, when they can be used and how they are
automatically generated.
DeltaFile
+49-0mlir/docs/Dialects/OpenMPDialect/_index.md
+49-01 files