LLVM/project ac7971c — llvm/lib/Target/AMDGPU AMDGPUGlobalISelDivergenceLowering.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel divergence-divergent-i1-used-outside-loop.mir divergence-divergent-i1-used-outside-loop.ll
AMDGPU/GlobalISel: Temporal divergence lowering i1 Use of i1 outside of the cycle, both uniform and divergent, is lane mask(in sgpr) that contains i1 at iteration that lane exited the cycle. Create phi that merges lane mask across all iterations.
