LLVM/project 1bb4306llvm/lib/CodeGen PeepholeOptimizer.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.sched.group.barrier.ll shufflevector.v2i64.v8i64.ll

PeepholeOpt: Allow introducing subregister uses on reg_sequence (#127052)

This reverts d246cc618adc52fdbd69d44a2a375c8af97b6106. We now handle
composing subregister extracts through reg_sequence.
DeltaFile
+444-444llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
+304-304llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+171-298llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
+220-215llvm/test/CodeGen/Thumb2/mve-vst3.ll
+157-211llvm/test/CodeGen/AMDGPU/load-global-i32.ll
+178-178llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
+155-155llvm/test/CodeGen/AMDGPU/idot4u.ll
+150-148llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
+140-124llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
+120-127llvm/test/CodeGen/AMDGPU/calling-conventions.ll
+113-122llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
+115-115llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
+74-89llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
+81-81llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
+53-90llvm/test/CodeGen/Thumb2/mve-shuffle.ll
+69-69llvm/test/CodeGen/Thumb2/mve-vst4.ll
+70-66llvm/test/CodeGen/Thumb2/mve-vld3.ll
+62-62llvm/test/CodeGen/AMDGPU/idot4s.ll
+62-62llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
+59-59llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
+61-53llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
+55-55llvm/test/CodeGen/Thumb2/mve-vldst4.ll
+53-54llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
+36-55llvm/test/CodeGen/AMDGPU/function-args.ll
+44-44llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
+38-38llvm/test/CodeGen/AMDGPU/select.f16.ll
+37-37llvm/test/CodeGen/AMDGPU/fptrunc.ll
+36-36llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
+33-33llvm/test/CodeGen/Thumb2/mve-vld4.ll
+24-39llvm/test/CodeGen/AMDGPU/call-argument-types.ll
+33-29llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
+33-29llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
+29-29llvm/test/CodeGen/AMDGPU/load-global-i16.ll
+31-27llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
+26-32llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-mixed-cases.ll
+28-28llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
+27-27llvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
+25-25llvm/test/CodeGen/AMDGPU/mul.ll
+25-25llvm/test/CodeGen/Thumb2/mve-vabdus.ll
+21-21llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
+20-20llvm/test/CodeGen/Thumb2/mve-vst4-post.ll
+18-18llvm/test/CodeGen/AMDGPU/ctpop64.ll
+18-18llvm/test/CodeGen/AMDGPU/idot8u.ll
+18-18llvm/test/CodeGen/Thumb2/mve-vst2.ll
+15-18llvm/test/CodeGen/AMDGPU/mul_int24.ll
+16-16llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
+16-16llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
+16-16llvm/test/CodeGen/AMDGPU/llvm.exp.ll
+11-11llvm/test/CodeGen/AMDGPU/srl.ll
+11-11llvm/test/CodeGen/AMDGPU/sra.ll
+11-11llvm/test/CodeGen/AMDGPU/shl.ll
+10-10llvm/test/CodeGen/AMDGPU/div_v2i128.ll
+10-9llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
+9-9llvm/test/CodeGen/Thumb2/mve-vld2.ll
+8-8llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
+5-8llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
+1-9llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
+3-6llvm/test/CodeGen/AMDGPU/kernel-args.ll
+2-4llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
+2-4llvm/test/CodeGen/AMDGPU/udiv.ll
+0-6llvm/lib/CodeGen/PeepholeOptimizer.cpp
+3,712-3,98161 files

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