LLVM/project 8370ac8llvm/utils/TableGen DecoderEmitter.cpp

[TableGen] Remove push_back from loop. NFC

We can initialize the vector to the right size and then assign
over some entries in the loop.
DeltaFile
+2-4llvm/utils/TableGen/DecoderEmitter.cpp
+2-41 files

LLVM/project 61efe36lldb/source/Commands CommandObjectDWIMPrint.cpp

[lldb] Avoid unnecessary regex check in dwim-print (#114608)

An (unmeasured) improvement to performance of `dwim-print` when used as `po`.

This change lifts the check for `note_shown` to the top of the lambda, to avoid all subsequent work when the hint has already been shown. The main effect is to avoid performing a regex match when the hint is not going to be shown.

This change also constructs the `std::regex` only once, by making it static.
DeltaFile
+6-5lldb/source/Commands/CommandObjectDWIMPrint.cpp
+6-51 files

LLVM/project f578982llvm/utils/TableGen DecoderEmitter.cpp

[TableGen] Remove unnecessary const_cast. NFC
DeltaFile
+1-1llvm/utils/TableGen/DecoderEmitter.cpp
+1-11 files

LLVM/project 6f7570cclang-tools-extra/clang-tidy/misc UseInternalLinkageCheck.cpp, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy][misc-use-internal-linkage] fix false positives for function or variable in header file which contains macro expansion (#129594)

When check whether in main file, spelling loc will lead to `<scratch
space>`. instead, expansion loc is close to loc after preprocess. It is
suitable to analyze linkage.
DeltaFile
+5-0clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-macro.hpp
+4-0clang-tools-extra/docs/ReleaseNotes.rst
+1-1clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
+10-13 files

LLVM/project 1bde981llvm/test/CodeGen/AMDGPU llvm.amdgcn.readfirstlane.ll identical-subrange-spill-infloop.ll

rebase and fix conflicts
DeltaFile
+144-272llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
+140-266llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
+118-132llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
+24-39llvm/test/CodeGen/AMDGPU/call-argument-types.ll
+1-1llvm/test/CodeGen/AMDGPU/issue48473.mir
+427-7105 files

LLVM/project 627fe1bllvm/test/CodeGen/AMDGPU call-argument-types.ll global_atomics_scan_fadd.ll

Start the partition from s40
DeltaFile
+1,256-1,256llvm/test/CodeGen/AMDGPU/call-argument-types.ll
+914-914llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
+914-914llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
+702-724llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
+638-638llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
+638-638llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
+5,062-5,08448 files not shown
+7,098-7,17454 files

LLVM/project 27d6094llvm/test/CodeGen/AMDGPU global_atomics_scan_fsub.ll global_atomics_scan_fadd.ll

[AMDGPU] Change SGPR layout to striped caller/callee saved

This PR updates the SGPR layout to a striped caller/callee-saved design, similar
to the VGPR layout. The stripe width is set to 8.

Fixes #113782.
DeltaFile
+1,830-1,830llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
+1,830-1,830llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
+1,554-1,554llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
+1,554-1,554llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
+1,286-1,271llvm/test/CodeGen/AMDGPU/call-argument-types.ll
+788-1,549llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
+8,842-9,58854 files not shown
+13,319-17,20360 files

LLVM/project d08cf79clang/lib/AST/ByteCode Interp.cpp InterpBuiltin.cpp, clang/test/AST/ByteCode builtin-constant-p.cpp

[clang][bytecode] Implement __builtin_constant_p (#130143)

Use the regular code paths for interpreting.

Add new instructions: `StartSpeculation` will reset the diagnostics
pointers to `nullptr`, which will keep us from reporting any diagnostics
during speculation. `EndSpeculation` will undo this.

The rest depends on what `Emitter` we use.

For `EvalEmitter`, we have no bytecode, so we implement `speculate()` by
simply visiting the first argument of `__builtin_constant_p`. If the
evaluation fails, we push a `0` on the stack, otherwise a `1`.

For `ByteCodeEmitter`, add another instrucion called `BCP`, that
interprets all the instructions following it until the next
`EndSpeculation` instruction. If any of those instructions fails, we
jump to the `EndLabel`, which brings us right before the
`EndSpeculation`. We then push the result on the stack.
DeltaFile
+108-2clang/test/AST/ByteCode/builtin-constant-p.cpp
+89-0clang/lib/AST/ByteCode/Interp.cpp
+0-79clang/lib/AST/ByteCode/InterpBuiltin.cpp
+27-0clang/lib/AST/ByteCode/EvalEmitter.cpp
+22-0clang/lib/AST/ByteCode/Compiler.cpp
+22-0clang/lib/AST/ByteCode/Interp.h
+268-818 files not shown
+306-8314 files

LLVM/project 892c18ellvm/lib/Transforms/InstCombine InstructionCombining.cpp, llvm/test/Transforms/InstCombine select.ll

[InstCombine] Enable select freeze poison folding when storing value

The non-freeze poison argument to select can be one of the following: global,
constant, and noundef arguments.

Alive2 test validation:
- https://alive2.llvm.org/ce/z/jbtCS6
- https://alive2.llvm.org/ce/z/YFA-5S
DeltaFile
+32-6llvm/test/Transforms/InstCombine/select.ll
+13-3llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+45-92 files

LLVM/project 7602d78clang/test/Driver hip-partial-link.hip

clang/HIP: Use regex for final path separator in hip-partial-link, again (#130371)

DeltaFile
+5-5clang/test/Driver/hip-partial-link.hip
+5-51 files

LLVM/project 942fb03mlir/lib/Target/LLVMIR ModuleTranslation.cpp, mlir/test/Target/LLVMIR llvmir.mlir

[MLIR][LLVMIR] Translation: honor target-features fn attribute (#130343)

DeltaFile
+12-0mlir/test/Target/LLVMIR/llvmir.mlir
+2-3mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
+14-32 files

LLVM/project ff033d1llvm/utils/TableGen DecoderEmitter.cpp

[TableGen] Use reference instead of pointer for FilterChooser in Filter. NFC
DeltaFile
+17-17llvm/utils/TableGen/DecoderEmitter.cpp
+17-171 files

LLVM/project e5af6e0llvm/include/llvm/IR ModuleSummaryIndex.h, llvm/lib/Bitcode/Writer BitcodeWriter.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.4
DeltaFile
+88-22llvm/include/llvm/IR/ModuleSummaryIndex.h
+17-10llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+105-322 files

LLVM/project 046f0a9llvm/include/llvm/IR ModuleSummaryIndex.h, llvm/lib/LTO LTO.cpp

rebase

Created using spr 1.3.4
DeltaFile
+26-1llvm/include/llvm/IR/ModuleSummaryIndex.h
+8-12llvm/lib/LTO/LTO.cpp
+34-132 files

LLVM/project 7dd5f23llvm/include/llvm/IR ModuleSummaryIndex.h, llvm/lib/LTO LTO.cpp

[NFC][LTO] Move GUID calculation into CfiFunctionIndex (#130370)

Preparation for CFI Index refactoring,
which will fix O(N^2) in ThinLTO indexing.
DeltaFile
+26-1llvm/include/llvm/IR/ModuleSummaryIndex.h
+8-12llvm/lib/LTO/LTO.cpp
+34-132 files

LLVM/project 17760eeclang/test/CodeGenCXX wasm-eh.cpp, libc/test/src/strings ffsl_test.cpp ffsll_test.cpp

rebase

Created using spr 1.3.4
DeltaFile
+117-48llvm/test/CodeGen/X86/finite-libcalls.ll
+49-0llvm/test/CodeGen/AMDGPU/copy-to-reg-frameindex.ll
+22-22clang/test/CodeGenCXX/wasm-eh.cpp
+42-0libc/test/src/strings/ffsl_test.cpp
+40-0libc/test/src/strings/ffsll_test.cpp
+18-18llvm/test/CodeGen/AMDGPU/select-undef.ll
+288-8858 files not shown
+668-21864 files

LLVM/project 3121da5flang/lib/Optimizer/CodeGen CodeGen.cpp TypeConverter.cpp, flang/test/Fir alloc-32.fir alloc.fir

Revert "[flang] In AllocMemOp lowering, convert types for calling malloc on 32-bit (#129308)"

This reverts commit cf1964af5a461196904b663ede04c26555fcff69.

This causes breakage on all the non-x86 buildbots as they don't have the i686
target enabled. This was missed in pre-commit CI.
DeltaFile
+0-29flang/test/Fir/alloc-32.fir
+7-13flang/lib/Optimizer/CodeGen/CodeGen.cpp
+1-18flang/lib/Optimizer/CodeGen/TypeConverter.cpp
+1-4flang/test/Integration/OpenMP/private-global.f90
+0-4flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
+0-3flang/test/Fir/alloc.fir
+9-711 files not shown
+9-747 files

LLVM/project d8747eamlir/lib/Target/LLVMIR ModuleTranslation.cpp, mlir/test/Target/LLVMIR llvmir.mlir

[MLIR][LLVMIR] Translation: honor frame-pointer fn attribute (#130335)

DeltaFile
+12-0mlir/test/Target/LLVMIR/llvmir.mlir
+3-6mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
+15-62 files

LLVM/project cf1964aflang/lib/Optimizer/CodeGen CodeGen.cpp TypeConverter.cpp, flang/test/Fir alloc-32.fir alloc.fir

[flang] In AllocMemOp lowering, convert types for calling malloc on 32-bit (#129308)

Although 32-bit targets are currently not officially supported, add a type conversion in the AllocMemOp lowering when calling the `malloc` function on 32-bit targets. This fixes a type mismatch, and this fix makes it easier to potentially support such targets in the future.

This involves making sure the `LLVMTypeConverter` has the necessary information to know the target bit width.

Co-authored-by: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
DeltaFile
+29-0flang/test/Fir/alloc-32.fir
+13-7flang/lib/Optimizer/CodeGen/CodeGen.cpp
+18-1flang/lib/Optimizer/CodeGen/TypeConverter.cpp
+4-1flang/test/Integration/OpenMP/private-global.f90
+4-0flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
+3-0flang/test/Fir/alloc.fir
+71-91 files not shown
+74-97 files

LLVM/project 5bc1667llvm/include/llvm/ADT EquivalenceClasses.h, llvm/lib/Analysis VectorUtils.cpp LoopAccessAnalysis.cpp

Revert "Reland [EquivClasses] Introduce members iterator-helper" (#130380)

Reverts llvm/llvm-project#130319

Multiple bot failures.
DeltaFile
+0-14llvm/unittests/ADT/EquivalenceClassesTest.cpp
+3-3llvm/lib/Analysis/VectorUtils.cpp
+3-2llvm/lib/Analysis/LoopAccessAnalysis.cpp
+0-4llvm/include/llvm/ADT/EquivalenceClasses.h
+6-234 files

LLVM/project 0e58030llvm/include/llvm/IR ModuleSummaryIndexYAML.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.4
DeltaFile
+8-4llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
+8-41 files

LLVM/project a5588b6libc/src/strings CMakeLists.txt ffsll.h, libc/test/src/strings ffsl_test.cpp ffsll_test.cpp

[libc] implement `strings/ffs` (#129892)

This patch adds the `strings/ffs` function.
ref: https://pubs.opengroup.org/onlinepubs/9799919799/functions/ffs.html
Closes: #122054.
DeltaFile
+42-0libc/test/src/strings/ffsl_test.cpp
+40-0libc/test/src/strings/ffsll_test.cpp
+32-0libc/test/src/strings/ffs_test.cpp
+30-0libc/src/strings/CMakeLists.txt
+30-0libc/test/src/strings/CMakeLists.txt
+20-0libc/src/strings/ffsll.h
+194-08 files not shown
+318-014 files

LLVM/project 15869a8llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.cpp, llvm/test/MC/Disassembler/AMDGPU gfx11_dasm_sop1.txt gfx12_dasm_sop1.txt

[AMDGPU][MC] Don't crash on decoding invalid SOP1 ssrc0 operands. (#130302)

These are encoded as 8-bit fields.
DeltaFile
+19-15llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+3-0llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop1.txt
+3-0llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
+25-153 files

LLVM/project 76393d3clang/test/CodeGenCXX wasm-eh.cpp

[WebAssembly] Rename functions in wasm-eh.cpp (#130220)

I think it is generally better for tests have some descriptive function
names so that we can insert new tests in the middle and don't have to
renumber all tests.

Also recently I added a (named) test to this file in #129020 so I think
it's consistent for other tests to be named.
DeltaFile
+22-22clang/test/CodeGenCXX/wasm-eh.cpp
+22-221 files

LLVM/project ab87206llvm/lib/Target/X86/GISel X86LegalizerInfo.cpp, llvm/test/CodeGen/X86 finite-libcalls.ll exp10-libcall-names.ll

[X86][GlobalISel] Enable POW/EXP*/LOG* functions with libcall mapping (#130328)

DeltaFile
+117-48llvm/test/CodeGen/X86/finite-libcalls.ll
+20-9llvm/test/CodeGen/X86/exp10-libcall-names.ll
+2-1llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+139-583 files

LLVM/project 41ecac5clang/test/Driver hip-partial-link.hip

clang/HIP: Use regex for final path separator in hip-partial-link, again

Follow up to c6b9d5ce76a155b682b1562122f43166aaa6391d in another instance.
This is still failing in unrelated PR prechecks, but passing its own check.
DeltaFile
+5-5clang/test/Driver/hip-partial-link.hip
+5-51 files

LLVM/project 8ce612fllvm/test/CodeGen/AMDGPU select-undef.ll schedule-vs-if-nested-loop-failure.ll, llvm/test/CodeGen/AMDGPU/GlobalISel divergent-control-flow.ll

AMDGPU: Replace undef phi inputs with poison in tests (#130267)

I think the chance of this changing the tests in meaningful ways
is very low. This was perl with a few minor adjustments to a few
tests that produce new undefs. Only one test had a minor codegen
change with the switch, which I dropped from the change.
DeltaFile
+18-18llvm/test/CodeGen/AMDGPU/select-undef.ll
+10-10llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll
+6-6llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
+5-5llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
+4-4llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-break-large-phis.ll
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
+47-4729 files not shown
+93-9335 files

LLVM/project ecec7d1llvm/lib/CodeGen/SelectionDAG SelectionDAGBuilder.cpp, llvm/test/CodeGen/AMDGPU copy-to-reg-frameindex.ll

DAG: Use phi in alloca constant case to create virtual registers (#130254)

This is a follow up from 39bf765bb671fa7df3fe6c164cc9532fcb8653bd,
for the other case handled here. We would create CopyToReg marked
as uniform, even though the end phi would need to use VGPRs due
to another divergent input. There's no directly observable change in
the final output of the new test, but it does hit this case.
DeltaFile
+49-0llvm/test/CodeGen/AMDGPU/copy-to-reg-frameindex.ll
+1-1llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+50-12 files

LLVM/project 0aa5b61llvm/include/llvm/IR ModuleSummaryIndex.h, llvm/lib/LTO LTO.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.4
DeltaFile
+26-0llvm/include/llvm/IR/ModuleSummaryIndex.h
+8-12llvm/lib/LTO/LTO.cpp
+34-122 files

LLVM/project 0db702allvm/include/llvm/IR ModuleSummaryIndex.h

[NFC][IR] Wrap std::set into CfiFunctionIndex (#130361)

Preparation for CFI Index refactoring,
which will fix O(N^2) in ThinLTO indexing.

We need a data structure to lookup by GUID.
Wrapping allow us to change implementation
with minimal changes to users.
DeltaFile
+29-14llvm/include/llvm/IR/ModuleSummaryIndex.h
+29-141 files