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Alexey Bataev (14)
prabhukr (14)
Fangrui Song (8)
River Riddle (7)
U-BERGUFFLEN\meinersbur (7)
Andrés Villegas (6)
Florian Mayer (5)
Paul Kirth (5)
Mehdi Amini (4)
Michele Scuttari (3)
Wang Pengcheng (3)
Alex Richardson (2)
Alexander Shaposhnikov (2)
Chris Lattner (2)
Florian Hahn (2)
Stella Laurenzo (2)
Congcong Cai (1)
Helena Kotas (1)
Jacques Pienaar (1)
Rob Suderman (1)
Tres Popp (1)
Vitaly Buka (1)
joaosaffran (1)
mingmingl (1)
wanglei (1)
xumingjie.enna1 (1)
yangzhaoxin (1)
author (49)
NAKAMURA Takumi (39)
Amir Ayupov (27)
Michael Kruse (16)
Alexey Bataev (14)
River Riddle (7)
U-BERGUFFLEN\meinersbur (7)
prabhukr (7)
Fangrui Song (6)
Krzysztof Parzyszek (6)
Necip Fazil Yildiran (6)
Florian Mayer (5)
Paul Kirth (5)
Mehdi Amini (4)
Andrés Villegas (3)
Florian Hahn (3)
Michele Scuttari (3)
ZhaoQi (3)
Aiden Grossman (2)
Alexander Shaposhnikov (2)
Chris Lattner (2)
Jacques Pienaar (2)
Peng Sun (2)
Tai Ly (2)
Vitaly Buka (2)
Wang Pengcheng (2)
Alex Richardson (1)
Congcong Cai (1)
Craig Topper (1)
Helena Kotas (1)
Hirofumi Nakamura (1)
Jack Frankland (1)
Jerry-Ge (1)
Michael Maitland (1)
Min-Yih Hsu (1)
Mingjie Xu (1)
Nikita Popov (1)
Pengcheng Wang (1)
Rob Suderman (1)
Roland McGrath (1)
Shengchen Kan (1)
Stella Laurenzo (1)
Suraj Sudhir (1)
TatWai Chong (1)
Tres Popp (1)
joaosaffran (1)
mingmingl (1)
wanglei (1)
xumingjie.enna1 (1)
yangzhaoxin (1)
branches (100+)
main (19)
users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME (9)
users/meinersbur/irbuilder-extract-refactor (6)
release/13.x (5)
users/chapuni/cov/single/nextcount-base (5)
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users/fmayer/spr/mte-generalize-overalignment-size-of-mte-globals (3)
users/alexey-bataev/spr/lvfiximprove-max-safe-distance-analysis (2)
users/alexey-bataev/spr/riscvcodegenttiuse-processshufflemasks-for-cost-estimationsactual-per-register-shuffles (2)
users/alexey-bataev/spr/slpimproved-reduction-costcodegen (2)
users/alexey-bataev/spr/slpinitial-non-power-of-2-but-still-whole-register-for-remaining-nodes (2)
users/alexey-bataev/spr/slpreduce-number-of-alternate-instruction-where-possible-1 (2)
users/chapuni/cov/single/base (2)
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users/chapuni/cov/single/loop (2)
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users/chapuni/cov/single/trunk (2)
users/fhahn/tysan-a-type-sanitizer-runtime-library (2)
users/kparzysz/spr/m01-applymem (2)
users/meinersbur/flang_runtime (2)
users/Enna1/asan-error-message-buffer (1)
users/Enna1/tysan-module-pass (1)
users/MaskRay/spr/asan-isinterestingalloca-remove-the-isallocapromotable-condition (1)
users/MaskRay/spr/driver-add-fandroid-pad-segment-fno-android-pad-segment (1)
users/MaskRay/spr/lldwasm-replace-config-with-ctxarg (1)
users/MaskRay/spr/llvm-objcopyelf-discard-locals-discad-all-allow-and-keep-symbols-referenced-by-relocations (1)
users/MaskRay/spr/main.asan-isinterestingalloca-remove-the-isallocapromotable-condition (1)
users/MaskRay/spr/main.lldwasm-replace-config-with-ctxarg (1)
users/MaskRay/spr/msan-unpoison-indirect-outputs-for-userspace-when-msan-handle-asm-conservative-is-specified (1)
users/MaskRay/spr/riscv-restore-dw_eh_pe_uleb128-call-site-encoding-for-gcc_except_table (1)
users/Prabhuk/sprasmprintercallgraphsection-emit-call-graph-section-4 (1)
users/Prabhuk/sprcallgraphsection-add-call-graph-section-options-and-documentation (1)
users/Prabhuk/sprcallsiteinfocallgraphsection-extend-callsiteinfo-with-typeid (1)
users/Prabhuk/sprcallsiteinfocallgraphsection-extract-and-propagate-indirect-call-type-ids (1)
users/Prabhuk/sprclangcallgraphsection-add-call-graph-section-option-and-docs (1)
users/Prabhuk/sprclangcallgraphsection-add-type-id-metadata-to-indirect-call-and-targets (1)
users/Prabhuk/sprclangcallgraphsection-add-type-id-metadata-to-indirect-call-and-targets-1 (1)
users/Prabhuk/sprmain.asmprintercallgraphsection-emit-call-graph-section-4 (1)
users/Prabhuk/sprmain.callgraphsection-add-call-graph-section-options-and-documentation (1)
users/Prabhuk/sprmain.callsiteinfocallgraphsection-extend-callsiteinfo-with-typeid (1)
users/Prabhuk/sprmain.callsiteinfocallgraphsection-extract-and-propagate-indirect-call-type-ids (1)
users/Prabhuk/sprmain.clangcallgraphsection-add-call-graph-section-option-and-docs (1)
users/Prabhuk/sprmain.clangcallgraphsection-add-type-id-metadata-to-indirect-call-and-targets (1)
users/Prabhuk/sprmain.clangcallgraphsection-add-type-id-metadata-to-indirect-call-and-targets-1 (1)
users/aaupov/spr/bolt-add-bolt-address-translation-documentation (1)
users/aaupov/spr/bolt-add-callsiteinfo-entries-in-yamlbat-1 (1)
users/aaupov/spr/bolt-deduplicate-equal-offsets-in-bat (1)
users/aaupov/spr/bolt-delta-encode-function-start-addresses-in-bat (1)
users/aaupov/spr/bolt-delta-encode-offsets-in-bat (1)
users/aaupov/spr/bolt-embed-cold-mapping-info-into-function-entry-in-bat (1)
users/aaupov/spr/bolt-emit-intra-function-control-flow-in-yamlbat (1)
users/aaupov/spr/bolt-encode-bat-using-uleb128 (1)
users/aaupov/spr/bolt-output-yaml-profile-in-bat-mode (1)
users/aaupov/spr/bolt-use-continuous-output-addresses-in-delta-encoding-in-bat (1)
users/aaupov/spr/bolt-write-and-parse-bfbb-hashes-in-bat (1)
users/aaupov/spr/boltnfc-const-ify-dataaggregatorgetlocationname (1)
users/aaupov/spr/boltnfc-expose-yamlprofilewriterconvert-function (1)
users/aaupov/spr/boltnfc-pass-bfbb-hashes-to-bat (1)
users/aaupov/spr/main.bolt-add-bolt-address-translation-documentation (1)
users/aaupov/spr/main.bolt-add-callsiteinfo-entries-in-yamlbat-1 (1)
users/aaupov/spr/main.bolt-deduplicate-equal-offsets-in-bat (1)
users/aaupov/spr/main.bolt-delta-encode-function-start-addresses-in-bat (1)
users/aaupov/spr/main.bolt-delta-encode-offsets-in-bat (1)
users/aaupov/spr/main.bolt-embed-cold-mapping-info-into-function-entry-in-bat (1)
users/aaupov/spr/main.bolt-emit-intra-function-control-flow-in-yamlbat (1)
users/aaupov/spr/main.bolt-encode-bat-using-uleb128 (1)
users/aaupov/spr/main.bolt-output-yaml-profile-in-bat-mode (1)
users/aaupov/spr/main.bolt-use-continuous-output-addresses-in-delta-encoding-in-bat (1)
users/aaupov/spr/main.bolt-write-and-parse-bfbb-hashes-in-bat (1)
users/aaupov/spr/main.boltnfc-const-ify-dataaggregatorgetlocationname (1)
users/aaupov/spr/main.boltnfc-expose-yamlprofilewriterconvert-function (1)
users/aaupov/spr/main.boltnfc-pass-bfbb-hashes-to-bat (1)
users/alexey-bataev/spr/lvenable-max-safe-distance-in-predicated-datawithevl-vectorization-mode (1)
users/alexey-bataev/spr/riscvcguse-processshufflemasks-for-per-register-shuffles-1 (1)
users/alexey-bataev/spr/slpfiximprove-getspillcost-analysis (1)
users/alexey-bataev/spr/slpimprove-findreusedorderedscalars-and-graph-rotation (1)
users/arichardson/spr/datalayoutlangref-split-non-integral-and-unstable-pointer-properties (1)
users/arichardson/spr/main.datalayoutlangref-split-non-integral-and-unstable-pointer-properties (1)
users/avillega/gsym-include-end_sequence-debug_line-rows-in-dwarf-transform (1)
users/avillega/gsymdwarf-include-end_sequence-debug_line-rows-when-looking-up-addr-ranges (1)
users/avillega/main.gsym-include-end_sequence-debug_line-rows-in-dwarf-transform (1)
users/avillega/main.gsymdwarf-include-end_sequence-debug_line-rows-when-looking-up-addr-ranges (1)
users/avillega/main.sanitizer_symbolizer-add-end-to-end-test-for-symbolizer-markup (1)
users/avillega/sanitizer_symbolizer-add-end-to-end-test-for-symbolizer-markup (1)
users/boomanaiden154/exegesis-validation-counters-implementation (1)
users/boomanaiden154/exegesis-validation-counters-tblgen (1)
users/ccc03-08-_astmatcher_templateargumentcountis_support_functiondecl_ (1)
users/chapuni/cov/binary (1)
users/chapuni/cov/merge/forfile (1)
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LLVM/project 552f6c9 — llvm/test/CodeGen/X86 vector-interleaved-store-i8-stride-7.ll vector-interleaved-store-i16-stride-6.ll, llvm/test/Instrumentation/MemorySanitizer/AArch64 arm64-ld1.ll

by Florian Mayer on ⎇
rebase

Created using spr 1.3.4
DeltaFile
+3,128-3,170llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
+2,487-2,510llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+2,099-2,096llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
+2,053-2,052llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop2.txt
+3,860-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-ld1.ll
+1,716-1,780llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
+15,343-11,6084,566 files not shown
+159,258-104,3134,572 files

LLVM/project 85e290b — llvm/test/CodeGen/AMDGPU bf16.ll, llvm/test/CodeGen/NVPTX cmpxchg-sm90.ll cmpxchg-sm70.ll

by Michael Kruse on ⎇
Merge branch 'main' into users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,350-4,196llvm/test/CodeGen/AMDGPU/bf16.ll
+6,173-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
+0-6,173llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
+90,478-10,3696,999 files not shown
+425,286-177,3787,005 files

LLVM/project 2ece26f — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

by prabhukr on ⎇
Update OB name from `type` to `callee_type`.

Created using spr 1.3.6-beta.1
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
+164,956-024,133 files not shown
+2,356,601-721,36324,139 files

LLVM/project 9c94049 — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

by prabhukr on ⎇
[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
+164,956-024,129 files not shown
+2,356,435-721,19824,135 files

LLVM/project 05307cf — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

by prabhukr on ⎇
Update LTO compilation CodeGen flag for call-graph-section.

Created using spr 1.3.6-beta.1
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
+164,956-024,129 files not shown
+2,356,435-721,19824,135 files

LLVM/project de23806 — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

by Necip Fazil Yildiran via prabhukr on ⎇
[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
+164,956-024,128 files not shown
+2,356,423-721,19324,134 files

LLVM/project 2c57c89 — llvm/test/Analysis/CostModel/AArch64 arith-widening.ll, llvm/test/CodeGen/RISCV qci-interrupt-attr.ll

by Helena Kotas on ⎇
Merge branch 'main' of https://github.com/llvm/llvm-project into remove-old-res-middle
DeltaFile
+2,099-2,096llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
+2,053-2,052llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop2.txt
+1,434-1,828llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
+2,915-0llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
+1,434-1,418llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
+940-1,896llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
+10,875-9,2902,274 files not shown
+97,298-62,3572,280 files

LLVM/project ed3f871 — llvm/test/Analysis/CostModel/AArch64 arith-widening.ll, llvm/test/CodeGen/RISCV/rvv fixed-vectors-cttz-vp.ll

by Vitaly Buka via GitHub on ⎇
Merge branch 'main' into users/vitalybuka/spr/ir-optimize-cfi-in-writecombinedglobalvaluesummary
DeltaFile
+2,099-2,096llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
+2,053-2,052llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop2.txt
+1,434-1,828llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
+1,434-1,418llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
+940-1,896llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
+1,240-1,230llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
+9,200-10,5201,240 files not shown
+47,494-33,1451,246 files

LLVM/project 9274743 — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Analysis/CostModel/AArch64 arith-widening.ll sve-intrinsics.ll

by Fangrui Song on ⎇
release note

Created using spr 1.3.5-bogner
DeltaFile
+940-1,896llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
+741-741llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
+660-658llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
+545-533llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
+464-470llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
+74-698llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+3,424-4,996379 files not shown
+13,173-12,743385 files

LLVM/project 913d077 — mlir/include/mlir/Dialect/Tosa/IR TosaComplianceData.h.inc, mlir/lib/Conversion/TosaToLinalg TosaToLinalg.cpp

by Tai Ly via GitHub on ⎇
[mlir][tosa] Change Rescale zero points to be inputs (#130340)

*Update RescaleOp to use zero-point as operands instead of attributes.
 *Check input_zp data type against the input and output_zp data type
   against the output.

Signed-off-by: Peng Sun <peng.sun at arm.com>
Co-authored-by: Peng Sun <peng.sun at arm.com>
DeltaFile
+62-35mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
+54-18mlir/test/Dialect/Tosa/invalid.mlir
+45-23mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
+22-8mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
+13-10mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
+10-3mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
+206-9710 files not shown
+261-11716 files

LLVM/project 397c487 — llvm/test/CodeGen/AMDGPU global_atomics_scan_fadd.ll global_atomics_scan_fsub.ll, llvm/test/CodeGen/RISCV/rvv fixed-vectors-cttz-vp.ll

by Congcong Cai on ⎇
Merge remote-tracking branch 'origin/main' into users/ccc03-08-_astmatcher_templateargumentcountis_support_functiondecl_
DeltaFile
+1,434-1,828llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
+1,246-1,246llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
+1,246-1,246llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
+1,214-1,214llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
+1,214-1,214llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
+726-1,509llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
+7,080-8,2571,023 files not shown
+37,140-28,4421,029 files

LLVM/project 3fb8cb6 — mlir/lib/Conversion/TosaToArith TosaToArith.cpp, mlir/lib/Conversion/TosaToLinalg TosaToLinalg.cpp

by TatWai Chong via GitHub on ⎇
[mlir][tosa] Add support for EXT-DOUBLEROUND and EXT-INEXACTROUND (#130337)
DeltaFile
+25-15mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
+20-19mlir/test/Dialect/Tosa/invalid.mlir
+32-1mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
+30-0mlir/test/Dialect/Tosa/invalid_extension.mlir
+12-4mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
+12-2mlir/lib/Conversion/TosaToArith/TosaToArith.cpp
+131-4119 files not shown
+186-6325 files

LLVM/project dc66ca4 — llvm/test/CodeGen/AMDGPU llvm.amdgcn.smfmac.gfx950.ll, llvm/test/CodeGen/RISCV xqccmp-push-pop-popret.ll

by Alexey Bataev on ⎇
Rebase, address comments

Created using spr 1.3.5
DeltaFile
+0-6,173llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
+6,173-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
+3,951-0llvm/test/CodeGen/RISCV/xqccmp-push-pop-popret.ll
+3,860-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-ld1.ll
+1,746-1,734llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
+1,348-1,952llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
+17,078-9,8592,714 files not shown
+131,118-67,3922,720 files

LLVM/project d4e79af — llvm/test/CodeGen/AMDGPU global_atomics_scan_fsub.ll global_atomics_scan_fadd.ll, llvm/test/CodeGen/RISCV qci-interrupt-attr.ll qci-interrupt-attr-fpr.ll

by Krzysztof Parzyszek via GitHub on ⎇
Merge branch 'main' into users/kparzysz/spr/o03-cancel-directive-name
DeltaFile
+2,927-0llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
+2,821-0llvm/test/CodeGen/RISCV/qci-interrupt-attr-fpr.ll
+1,246-1,246llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
+1,246-1,246llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
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LLVM/project 7dc7264 — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

by yangzhaoxin on ⎇
Merge branch 'main' into users/ylzsx/r-tls-noie
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+29,745-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
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+203,722-016,100 files not shown
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LLVM/project 5685def — mlir/include/mlir/Dialect/Tosa/Utils QuantUtils.h, mlir/lib/Conversion/TosaToLinalg TosaToLinalg.cpp

by Peng Sun via GitHub on ⎇
[mlir][tosa] Convert RESCALE op multiplier and shift from attributes to inputs (#129720)
DeltaFile
+181-0mlir/test/Dialect/Tosa/invalid.mlir
+141-1mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
+25-9mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
+19-3mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
+20-0mlir/include/mlir/Dialect/Tosa/Utils/QuantUtils.h
+12-8mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
+398-218 files not shown
+435-3614 files

LLVM/project 2ff290b — llvm/test/CodeGen/RISCV xqccmp-push-pop-popret.ll qci-interrupt-attr.ll, llvm/test/CodeGen/X86 vector-interleaved-store-i16-stride-7.ll vector-interleaved-store-i8-stride-7.ll

by Alexey Bataev on ⎇
Rebase

Created using spr 1.3.5
DeltaFile
+3,951-0llvm/test/CodeGen/RISCV/xqccmp-push-pop-popret.ll
+3,860-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-ld1.ll
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+2,927-0llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
+2,821-0llvm/test/CodeGen/RISCV/qci-interrupt-attr-fpr.ll
+16,837-3,2681,830 files not shown
+73,594-27,5911,836 files

LLVM/project 8cb72bd — llvm/test/CodeGen/NVPTX cmpxchg-sm90.ll cmpxchg-sm60.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

by Florian Mayer on ⎇
reb

Created using spr 1.3.4
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+0-6,173llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
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+88,808-6,1733,815 files not shown
+253,453-75,5073,821 files

LLVM/project e04f4cc — mlir/include/mlir/Dialect/Tosa/Utils QuantUtils.h, mlir/lib/Dialect/Tosa/Utils QuantUtils.cpp

by Jerry-Ge via GitHub on ⎇
[mlir][tosa] Add check for invalid tosa.rescale parameters (#129606)

* mlir::tosa::computeMultiplierAndShift returns a boolean, depending on
validity of the shift value

Signed-off-by: Jerry Ge <jerry.ge at arm.com>
Co-authored-by: Tom Allsop <tom.allsop at arm.com>
DeltaFile
+10-3mlir/lib/Dialect/Tosa/Utils/QuantUtils.cpp
+2-1mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
+1-1mlir/include/mlir/Dialect/Tosa/Utils/QuantUtils.h
+13-53 files

LLVM/project b2e1758 — llvm/test/CodeGen/AMDGPU llvm.amdgcn.smfmac.gfx950.ll, llvm/test/Instrumentation/MemorySanitizer/AArch64 arm64-vmul.ll neon_vmul.ll

by Alexey Bataev on ⎇
Rebase, address comments

Created using spr 1.3.5
DeltaFile
+6,173-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
+0-6,173llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
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+11,371-10,0581,125 files not shown
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LLVM/project 5ea9c7e — clang/lib/Headers avx10_2convertintrin.h, llvm/test/Instrumentation/MemorySanitizer/AArch64 arm64-vmul.ll neon_vmul.ll

by Alexey Bataev on ⎇
Reabse, address comments

Created using spr 1.3.5
DeltaFile
+6,173-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
+0-6,173llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
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+12,877-8,1571,598 files not shown
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LLVM/project 8179bcf — mlir/include/mlir/Dialect/Tosa/IR TosaOps.td, mlir/test/Conversion/TosaToLinalg tosa-to-linalg.mlir tosa-to-linalg-invalid.mlir

by Peng Sun via GitHub on ⎇
[mlir][tosa] Make RESCALE op input_unsigned and output_unsigned attributes required (#129339)

Previously, the input_unsigned and output_unsigned attributes on the
RESCALE op were optional. This commit updates them to be required,
ensuring compliance with the TOSA V1.0 Specification.

Signed-off-by: Peng Sun <peng.sun at arm.com>
Co-authored-by: James Ward <james.ward at arm.com>
DeltaFile
+9-9mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
+6-1mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
+2-2mlir/test/Dialect/Tosa/ops.mlir
+2-2mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
+1-1mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-invalid.mlir
+1-1mlir/test/Dialect/Tosa/availability.mlir
+21-162 files not shown
+22-198 files

LLVM/project e45a72a — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

by Florian Mayer on ⎇
refactor

Created using spr 1.3.4
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
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+164,956-015,561 files not shown
+1,914,489-576,76815,567 files

LLVM/project d9751a3 — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

by NAKAMURA Takumi on ⎇
Merge branch 'main' into users/chapuni/yaml/newgen

Conflicts:
        llvm/test/tools/llvm-cov/Inputs/branch-logical-mixed.cpp
        llvm/test/tools/llvm-cov/Inputs/branch-macros.cpp
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
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+3,294,806-1,187,82230,009 files

LLVM/project a63f09e — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

by Vitaly Buka on ⎇
rebase

Created using spr 1.3.4
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
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+164,956-014,444 files not shown
+1,781,638-474,01214,450 files

LLVM/project 176d034 — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

by ZhaoQi via GitHub on ⎇
Merge branch 'main' into users/zhaoqi5/opt-tlsle-mergebaseoffset
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
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LLVM/project e80ef33 — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

by joaosaffran on ⎇
Merge branch 'main' into users/joaosaffran/123147
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
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+164,956-08,330 files not shown
+1,405,013-244,2488,336 files

LLVM/project 3fad066 — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

by Necip Fazil Yildiran via prabhukr on ⎇
Rebase on top of main.

Created using spr 1.3.6-beta.1
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
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LLVM/project 2d88d20 — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

by Necip Fazil Yildiran via prabhukr on ⎇
[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
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+164,956-021,151 files not shown
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LLVM/project f38ce99 — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

by Necip Fazil Yildiran via prabhukr on ⎇
Rebase on top of main.

Created using spr 1.3.6-beta.1
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
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+2,151,133-609,87521,157 files