LLVM/project 7dc7264llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'main' into users/ylzsx/r-tls-noie
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+29,745-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
+203,722-016,100 files not shown
+2,040,184-604,85516,106 files

LLVM/project 8c41ae6lldb/tools/lldb-dap lldb-dap.cpp, llvm/test/CodeGen/AMDGPU bf16.ll

Merge branch 'main' into users/meinersbur/flang_runtime_premerge
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,194-3,880llvm/test/CodeGen/AMDGPU/bf16.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
+309-5,049lldb/tools/lldb-dap/lldb-dap.cpp
+90,138-8,9295,013 files not shown
+307,445-100,3025,019 files

LLVM/project a97bbe6lldb/tools/lldb-dap lldb-dap.cpp, llvm/test/CodeGen/AMDGPU bf16.ll

rebase

Created using spr 1.3.5-bogner
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,194-3,880llvm/test/CodeGen/AMDGPU/bf16.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
+309-5,049lldb/tools/lldb-dap/lldb-dap.cpp
+90,138-8,9294,327 files not shown
+283,321-85,4414,333 files

LLVM/project 519ae24llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/nest-base' into users/chapuni/mcdc/nest/trunk
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+102,453-36,85810,567 files not shown
+953,290-609,13410,573 files

LLVM/project 03c851allvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/bitmapaddr' into users/chapuni/mcdc/nest/nest-base

Conflicts:
        clang/test/CoverageMapping/mcdc-single-cond.cpp
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+102,453-36,85810,567 files not shown
+953,290-609,13410,573 files

LLVM/project d6cb61allvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/bitmapaddr
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+102,453-36,85810,567 files not shown
+953,323-609,04210,573 files

LLVM/project 457cf4bllvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/mcdcstate
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+102,453-36,85810,567 files not shown
+953,323-609,04210,573 files

LLVM/project aac9c6dllvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/lnot
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+102,453-36,85810,566 files not shown
+953,289-609,12910,572 files

LLVM/project e57bdccllvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/expect
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+102,453-36,85810,566 files not shown
+953,289-609,12910,572 files

LLVM/project 9a175d0llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'main' into users/chapuni/mcdc/nest/tests
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+102,453-36,85810,565 files not shown
+953,289-609,03210,571 files

LLVM/project 967dc03llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

run 'git merge main'
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+102,453-36,8588,560 files not shown
+809,659-558,2578,566 files

LLVM/project f8b734fllvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

fix order

Created using spr 1.3.4
DeltaFile
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+43,825-43,8257,407 files not shown
+681,199-531,6487,413 files

LLVM/project 41056e8llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]
DeltaFile
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+43,825-43,8257,401 files not shown
+681,165-531,6217,407 files

LLVM/project a9bf1f2flang/test/Lower allocatable-assignment.f90 array-expression.f90, lldb/tools/lldb-dap lldb-dap.cpp

rebase

Created using spr 1.3.4
DeltaFile
+7,163-3,829llvm/test/CodeGen/AMDGPU/bf16.ll
+4,269-28llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
+249-2,316lldb/tools/lldb-dap/lldb-dap.cpp
+2,163-0llvm/test/CodeGen/X86/vector-lrint-f16.ll
+190-1,086flang/test/Lower/allocatable-assignment.f90
+0-1,265flang/test/Lower/array-expression.f90
+14,034-8,5241,008 files not shown
+53,160-26,4091,014 files

LLVM/project 0cfee98llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

Rebase

Created using spr 1.3.5
DeltaFile
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+43,825-43,8254,283 files not shown
+513,606-420,7004,289 files

LLVM/project af42b11llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

rebase

Created using spr 1.3.4
DeltaFile
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+43,825-43,8254,198 files not shown
+510,585-434,2364,204 files

LLVM/project e45a72allvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

refactor

Created using spr 1.3.4
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
+164,956-015,561 files not shown
+1,914,489-576,76815,567 files

LLVM/project 89e80ablldb/source/Plugins/ABI/LoongArch ABISysV_loongarch.cpp, lldb/test/API/functionalities/postmortem/elf-core TestLinuxCore.py

[lldb][LoongArch] Complete register alias name in `AugmentRegisterInfo`

Fixes: https://github.com/llvm/llvm-project/issues/123903

Reviewed By: DavidSpickett, SixWeining

Pull Request: https://github.com/llvm/llvm-project/pull/124059
DeltaFile
+43-36lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
+17-25lldb/source/Plugins/ABI/LoongArch/ABISysV_loongarch.cpp
+39-0lldb/test/Shell/Register/loongarch64-gp-read.test
+37-0lldb/test/Shell/Register/Inputs/loongarch64-gp-read.cpp
+2-0llvm/utils/lit/lit/llvm/config.py
+138-615 files

LLVM/project 8ad3d66llvm/lib/Target/NVPTX NVPTXISelDAGToDAG.cpp, llvm/test/CodeGen/RISCV/rvv fixed-vectors-interleaved-access.ll

rebase and resolve conflicts

Created using spr 1.3.5-bogner
DeltaFile
+660-653llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
+684-0mlir/test/Dialect/Tosa/availability.mlir
+476-0mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
+62-381llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+403-0mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h
+356-0mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
+2,641-1,034315 files not shown
+10,257-3,599321 files

LLVM/project d09e52bllvm/test/CodeGen/AArch64 cmpbr-reg-imm-at-bounds.ll cmpbr-reg-reg.ll, llvm/test/CodeGen/RISCV fold-mem-offset.ll

Address comment

Created using spr 1.3.5
DeltaFile
+1,328-0llvm/test/CodeGen/AArch64/cmpbr-reg-imm-at-bounds.ll
+660-653llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
+641-312llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
+733-0llvm/test/CodeGen/RISCV/fold-mem-offset.ll
+586-0llvm/test/CodeGen/AArch64/cmpbr-reg-reg.ll
+583-0llvm/test/CodeGen/AArch64/cmpbr-reg-imm.ll
+4,531-965514 files not shown
+16,939-6,001520 files

LLVM/project c48e0c1lldb/source/Plugins/ABI/RISCV ABISysV_riscv.cpp, lldb/test/API/functionalities/gdb_remote_client TestGDBServerTargetXML.py basic_eh_frame-riscv64.yaml

[lldb][RISC-V] Extended if conditions to support alias names for registers (#124475)

Extending the conditionals in `AugmentRegisterInfo` to support
alternative names for lldb.

Fixes #124023

There is an exception with register `X8` which is not covered here but
more details can be found in the issue
https://github.com/llvm/llvm-project/issues/127900.
DeltaFile
+86-72lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
+148-0lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
+108-0lldb/test/Shell/Register/riscv64-gp-read.test
+54-0lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
+36-0lldb/test/Shell/Register/Inputs/riscv64-gp-read.cpp
+20-0lldb/test/API/functionalities/gdb_remote_client/basic_eh_frame-riscv64.yaml
+452-721 files not shown
+458-747 files

LLVM/project b77caf2lldb/test/Shell/Register loongarch64-gp-read.test, lldb/test/Shell/Register/Inputs loongarch64-gp-read.cpp

add test

Created using spr 1.3.5-bogner
DeltaFile
+39-0lldb/test/Shell/Register/loongarch64-gp-read.test
+35-0lldb/test/Shell/Register/Inputs/loongarch64-gp-read.cpp
+2-0llvm/utils/lit/lit/llvm/config.py
+76-03 files

LLVM/project 84b10d4clang/lib/Driver OffloadBundler.cpp, clang/test/Driver clang-offload-bundler.c clang-offload-bundler-standardize.c

[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target

The current parsing of target string assumes to be in a form of
`kind-triple-targetid:feature`, such as
`hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not
contain any `-`, which is not the case for generic target. Also, a generic
target may contain one or more `-`, such as `gfx10-3-generic` and
`gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things
work right. This patch reworks the logic to parse the target string to make it
more robust, as well as supporting generic target.
DeltaFile
+24-24clang/test/Driver/clang-offload-bundler.c
+23-24clang/lib/Driver/OffloadBundler.cpp
+5-13clang/test/Driver/clang-offload-bundler-standardize.c
+8-8clang/test/Driver/clang-offload-bundler-zlib.c
+7-7clang/test/Driver/clang-offload-bundler-asserts-on.c
+11-1llvm/utils/lit/lit/llvm/config.py
+78-7711 files not shown
+117-11417 files

LLVM/project 0075687clang/lib/Driver OffloadBundler.cpp, clang/test/Driver clang-offload-bundler.c clang-offload-bundler-standardize.c

[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target

The current parsing of target string assumes to be in a form of
`kind-triple-targetid:feature`, such as
`hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not
contain any `-`, which is not the case for generic target. Also, a generic
target may contain one or more `-`, such as `gfx10-3-generic` and
`gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things
work right. This patch reworks the logic to parse the target string to make it
more robust, as well as supporting generic target.
DeltaFile
+24-24clang/test/Driver/clang-offload-bundler.c
+23-24clang/lib/Driver/OffloadBundler.cpp
+5-13clang/test/Driver/clang-offload-bundler-standardize.c
+7-7clang/test/Driver/clang-offload-bundler-asserts-on.c
+6-6clang/test/Driver/clang-offload-bundler-zstd.c
+6-6clang/test/Driver/clang-offload-bundler-zlib.c
+71-8011 files not shown
+115-11217 files

LLVM/project 1b13d14clang/lib/Driver OffloadBundler.cpp, clang/test/Driver clang-offload-bundler.c clang-offload-bundler-standardize.c

[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target

The current parsing of target string assumes to be in a form of
`kind-triple-targetid:feature`, such as
`hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not
contain any `-`, which is not the case for generic target. Also, a generic
target may contain one or more `-`, such as `gfx10-3-generic` and
`gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things
work right. This patch reworks the logic to parse the target string to make it
more robust, as well as supporting generic target.
DeltaFile
+24-24clang/test/Driver/clang-offload-bundler.c
+23-24clang/lib/Driver/OffloadBundler.cpp
+5-13clang/test/Driver/clang-offload-bundler-standardize.c
+7-7clang/test/Driver/clang-offload-bundler-asserts-on.c
+6-6clang/test/Driver/clang-offload-bundler-zstd.c
+11-1llvm/utils/lit/lit/llvm/config.py
+76-7511 files not shown
+115-11217 files

LLVM/project 2055d82clang/lib/Driver OffloadBundler.cpp, clang/test/Driver clang-offload-bundler.c clang-offload-bundler-standardize.c

[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target

The current parsing of target string assumes to be in a form of
`kind-triple-targetid:feature`, such as
`hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not
contain any `-`, which is not the case for generic target. Also, a generic
target may contain one or more `-`, such as `gfx10-3-generic` and
`gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things
work right. This patch reworks the logic to parse the target string to make it
more robust, as well as supporting generic target.
DeltaFile
+24-24clang/test/Driver/clang-offload-bundler.c
+23-24clang/lib/Driver/OffloadBundler.cpp
+5-13clang/test/Driver/clang-offload-bundler-standardize.c
+7-7clang/test/Driver/clang-offload-bundler-asserts-on.c
+11-1llvm/utils/lit/lit/llvm/config.py
+6-6clang/test/Driver/hip-toolchain-rdc-separate.hip
+76-7511 files not shown
+116-11317 files

LLVM/project 9966972clang/lib/Driver OffloadBundler.cpp, clang/test/Driver clang-offload-bundler.c clang-offload-bundler-standardize.c

[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target

The current parsing of target string assumes to be in a form of
`kind-triple-targetid:feature`, such as
`hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not
contain any `-`, which is not the case for generic target. Also, a generic
target may contain one or more `-`, such as `gfx10-3-generic` and
`gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things
work right. This patch reworks the logic to parse the target string to make it
more robust, as well as supporting generic target.
DeltaFile
+24-24clang/test/Driver/clang-offload-bundler.c
+23-24clang/lib/Driver/OffloadBundler.cpp
+5-13clang/test/Driver/clang-offload-bundler-standardize.c
+7-7clang/test/Driver/clang-offload-bundler-asserts-on.c
+6-6clang/test/Driver/hip-toolchain-rdc-separate.hip
+11-1llvm/utils/lit/lit/llvm/config.py
+76-7510 files not shown
+113-11016 files

LLVM/project 011c79cclang/lib/Driver OffloadBundler.cpp, clang/test/Driver clang-offload-bundler.c clang-offload-bundler-standardize.c

[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target

The current parsing of target string assumes to be in a form of
`kind-triple-targetid:feature`, such as
`hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not
contain any `-`, which is not the case for generic target. Also, a generic
target may contain one or more `-`, such as `gfx10-3-generic` and
`gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things
work right. This patch reworks the logic to parse the target string to make it
more robust, as well as supporting generic target.
DeltaFile
+24-24clang/test/Driver/clang-offload-bundler.c
+23-24clang/lib/Driver/OffloadBundler.cpp
+5-13clang/test/Driver/clang-offload-bundler-standardize.c
+7-7clang/test/Driver/clang-offload-bundler-asserts-on.c
+6-6clang/test/Driver/clang-offload-bundler-zstd.c
+6-6clang/test/Driver/clang-offload-bundler-zlib.c
+71-8010 files not shown
+113-11016 files

LLVM/project e7eac39clang/lib/Driver OffloadBundler.cpp, clang/test/Driver clang-offload-bundler.c clang-offload-bundler-standardize.c

[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target

The current parsing of target string assumes to be in a form of
`kind-triple-targetid:feature`, such as
`hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not
contain any `-`, which is not the case for generic target. Also, a generic
target may contain one or more `-`, such as `gfx10-3-generic` and
`gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things
work right. This patch reworks the logic to parse the target string to make it
more robust, as well as supporting generic target.
DeltaFile
+24-24clang/test/Driver/clang-offload-bundler.c
+23-24clang/lib/Driver/OffloadBundler.cpp
+5-13clang/test/Driver/clang-offload-bundler-standardize.c
+7-7clang/test/Driver/clang-offload-bundler-asserts-on.c
+6-6clang/test/Driver/clang-offload-bundler-zstd.c
+11-1llvm/utils/lit/lit/llvm/config.py
+76-7510 files not shown
+113-11016 files

LLVM/project c2588feclang/lib/Driver OffloadBundler.cpp, clang/test/Driver clang-offload-bundler.c clang-offload-bundler-standardize.c

[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target

The current parsing of target string assumes to be in a form of
`kind-triple-targetid:feature`, such as
`hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not
contain any `-`, which is not the case for generic target. Also, a generic
target may contain one or more `-`, such as `gfx10-3-generic` and
`gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things
work right. This patch reworks the logic to parse the target string to make it
more robust, as well as supporting generic target.
DeltaFile
+24-24clang/test/Driver/clang-offload-bundler.c
+23-24clang/lib/Driver/OffloadBundler.cpp
+5-13clang/test/Driver/clang-offload-bundler-standardize.c
+7-7clang/test/Driver/clang-offload-bundler-asserts-on.c
+6-6clang/test/Driver/clang-offload-bundler-zlib.c
+11-1llvm/utils/lit/lit/llvm/config.py
+76-7510 files not shown
+113-11016 files