LLVM/project 7dc7264 — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll
Merge branch 'main' into users/ylzsx/r-tls-noie
Merge branch 'main' into users/ylzsx/r-tls-noie
Merge branch 'main' into users/meinersbur/flang_runtime_premerge
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,194 | -3,880 | llvm/test/CodeGen/AMDGPU/bf16.ll |
+5,680 | -0 | llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll |
+5,680 | -0 | llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll |
+5,680 | -0 | llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll |
+309 | -5,049 | lldb/tools/lldb-dap/lldb-dap.cpp |
+90,138 | -8,929 | 5,013 files not shown |
+307,445 | -100,302 | 5,019 files |
rebase Created using spr 1.3.5-bogner
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,194 | -3,880 | llvm/test/CodeGen/AMDGPU/bf16.ll |
+5,680 | -0 | llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll |
+5,680 | -0 | llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll |
+5,680 | -0 | llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll |
+309 | -5,049 | lldb/tools/lldb-dap/lldb-dap.cpp |
+90,138 | -8,929 | 4,327 files not shown |
+283,321 | -85,441 | 4,333 files |
Merge branch 'users/chapuni/mcdc/nest/nest-base' into users/chapuni/mcdc/nest/trunk
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+102,453 | -36,858 | 10,567 files not shown |
+953,290 | -609,134 | 10,573 files |
Merge branch 'users/chapuni/mcdc/nest/bitmapaddr' into users/chapuni/mcdc/nest/nest-base Conflicts: clang/test/CoverageMapping/mcdc-single-cond.cpp
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+102,453 | -36,858 | 10,567 files not shown |
+953,290 | -609,134 | 10,573 files |
Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/bitmapaddr
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+102,453 | -36,858 | 10,567 files not shown |
+953,323 | -609,042 | 10,573 files |
Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/mcdcstate
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+102,453 | -36,858 | 10,567 files not shown |
+953,323 | -609,042 | 10,573 files |
Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/lnot
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+102,453 | -36,858 | 10,566 files not shown |
+953,289 | -609,129 | 10,572 files |
Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/expect
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+102,453 | -36,858 | 10,566 files not shown |
+953,289 | -609,129 | 10,572 files |
Merge branch 'main' into users/chapuni/mcdc/nest/tests
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+102,453 | -36,858 | 10,565 files not shown |
+953,289 | -609,032 | 10,571 files |
run 'git merge main'
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+102,453 | -36,858 | 8,560 files not shown |
+809,659 | -558,257 | 8,566 files |
fix order Created using spr 1.3.4
Delta | File | |
---|---|---|
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+43,825 | -43,825 | 7,407 files not shown |
+681,199 | -531,648 | 7,413 files |
[𝘀𝗽𝗿] changes introduced through rebase Created using spr 1.3.4 [skip ci]
Delta | File | |
---|---|---|
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+43,825 | -43,825 | 7,401 files not shown |
+681,165 | -531,621 | 7,407 files |
rebase Created using spr 1.3.4
Delta | File | |
---|---|---|
+7,163 | -3,829 | llvm/test/CodeGen/AMDGPU/bf16.ll |
+4,269 | -28 | llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll |
+249 | -2,316 | lldb/tools/lldb-dap/lldb-dap.cpp |
+2,163 | -0 | llvm/test/CodeGen/X86/vector-lrint-f16.ll |
+190 | -1,086 | flang/test/Lower/allocatable-assignment.f90 |
+0 | -1,265 | flang/test/Lower/array-expression.f90 |
+14,034 | -8,524 | 1,008 files not shown |
+53,160 | -26,409 | 1,014 files |
Rebase Created using spr 1.3.5
Delta | File | |
---|---|---|
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+43,825 | -43,825 | 4,283 files not shown |
+513,606 | -420,700 | 4,289 files |
rebase Created using spr 1.3.4
Delta | File | |
---|---|---|
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+43,825 | -43,825 | 4,198 files not shown |
+510,585 | -434,236 | 4,204 files |
refactor Created using spr 1.3.4
Delta | File | |
---|---|---|
+30,641 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+27,655 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+27,655 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+27,139 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+25,933 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll |
+25,933 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll |
+164,956 | -0 | 15,561 files not shown |
+1,914,489 | -576,768 | 15,567 files |
[lldb][LoongArch] Complete register alias name in `AugmentRegisterInfo` Fixes: https://github.com/llvm/llvm-project/issues/123903 Reviewed By: DavidSpickett, SixWeining Pull Request: https://github.com/llvm/llvm-project/pull/124059
rebase and resolve conflicts Created using spr 1.3.5-bogner
Address comment Created using spr 1.3.5
[lldb][RISC-V] Extended if conditions to support alias names for registers (#124475) Extending the conditionals in `AugmentRegisterInfo` to support alternative names for lldb. Fixes #124023 There is an exception with register `X8` which is not covered here but more details can be found in the issue https://github.com/llvm/llvm-project/issues/127900.
add test Created using spr 1.3.5-bogner
Delta | File | |
---|---|---|
+39 | -0 | lldb/test/Shell/Register/loongarch64-gp-read.test |
+35 | -0 | lldb/test/Shell/Register/Inputs/loongarch64-gp-read.cpp |
+2 | -0 | llvm/utils/lit/lit/llvm/config.py |
+76 | -0 | 3 files |
[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target The current parsing of target string assumes to be in a form of `kind-triple-targetid:feature`, such as `hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not contain any `-`, which is not the case for generic target. Also, a generic target may contain one or more `-`, such as `gfx10-3-generic` and `gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things work right. This patch reworks the logic to parse the target string to make it more robust, as well as supporting generic target.
[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target The current parsing of target string assumes to be in a form of `kind-triple-targetid:feature`, such as `hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not contain any `-`, which is not the case for generic target. Also, a generic target may contain one or more `-`, such as `gfx10-3-generic` and `gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things work right. This patch reworks the logic to parse the target string to make it more robust, as well as supporting generic target.
[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target The current parsing of target string assumes to be in a form of `kind-triple-targetid:feature`, such as `hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not contain any `-`, which is not the case for generic target. Also, a generic target may contain one or more `-`, such as `gfx10-3-generic` and `gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things work right. This patch reworks the logic to parse the target string to make it more robust, as well as supporting generic target.
[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target The current parsing of target string assumes to be in a form of `kind-triple-targetid:feature`, such as `hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not contain any `-`, which is not the case for generic target. Also, a generic target may contain one or more `-`, such as `gfx10-3-generic` and `gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things work right. This patch reworks the logic to parse the target string to make it more robust, as well as supporting generic target.
[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target The current parsing of target string assumes to be in a form of `kind-triple-targetid:feature`, such as `hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not contain any `-`, which is not the case for generic target. Also, a generic target may contain one or more `-`, such as `gfx10-3-generic` and `gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things work right. This patch reworks the logic to parse the target string to make it more robust, as well as supporting generic target.
[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target The current parsing of target string assumes to be in a form of `kind-triple-targetid:feature`, such as `hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not contain any `-`, which is not the case for generic target. Also, a generic target may contain one or more `-`, such as `gfx10-3-generic` and `gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things work right. This patch reworks the logic to parse the target string to make it more robust, as well as supporting generic target.
[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target The current parsing of target string assumes to be in a form of `kind-triple-targetid:feature`, such as `hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not contain any `-`, which is not the case for generic target. Also, a generic target may contain one or more `-`, such as `gfx10-3-generic` and `gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things work right. This patch reworks the logic to parse the target string to make it more robust, as well as supporting generic target.
[OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support generic target The current parsing of target string assumes to be in a form of `kind-triple-targetid:feature`, such as `hipv4-amdgcn-amd-amdhsa-gfx1030:+xnack`. Specifically, the target id does not contain any `-`, which is not the case for generic target. Also, a generic target may contain one or more `-`, such as `gfx10-3-generic` and `gfx12-generic`. As a result, we can no longer depend on `rstrip` to get things work right. This patch reworks the logic to parse the target string to make it more robust, as well as supporting generic target.