LLVM/project e61859fllvm/lib/Target/RISCV RISCVInstrInfoXqci.td RISCVFeatures.td, llvm/lib/Target/RISCV/AsmParser RISCVAsmParser.cpp

[RISCV] Add Qualcomm uC Xqcili (load large immediates) extension (#130012)

The Xqcili extension includes a two instructions that load large
immediates than is available with the base RISC-V ISA.

The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/tag/Xqci-0.7.0

This patch adds assembler only support.
DeltaFile
+46-0llvm/test/MC/RISCV/xqcili-valid.s
+32-0llvm/test/MC/RISCV/xqcili-invalid.s
+15-0llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
+13-0llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+8-0llvm/lib/Target/RISCV/RISCVFeatures.td
+3-3llvm/lib/TargetParser/RISCVISAInfo.cpp
+117-37 files not shown
+132-613 files