LLVM/project 85e290bllvm/test/CodeGen/AMDGPU bf16.ll, llvm/test/CodeGen/NVPTX cmpxchg-sm90.ll cmpxchg-sm70.ll

Merge branch 'main' into users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,350-4,196llvm/test/CodeGen/AMDGPU/bf16.ll
+6,173-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
+0-6,173llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
+90,478-10,3696,999 files not shown
+425,286-177,3787,005 files

LLVM/project 7dc7264llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'main' into users/ylzsx/r-tls-noie
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+29,745-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
+203,722-016,100 files not shown
+2,040,184-604,85516,106 files

LLVM/project 8c41ae6lldb/tools/lldb-dap lldb-dap.cpp, llvm/test/CodeGen/AMDGPU bf16.ll

Merge branch 'main' into users/meinersbur/flang_runtime_premerge
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,194-3,880llvm/test/CodeGen/AMDGPU/bf16.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
+309-5,049lldb/tools/lldb-dap/lldb-dap.cpp
+90,138-8,9295,013 files not shown
+307,445-100,3025,019 files

LLVM/project a97bbe6lldb/tools/lldb-dap lldb-dap.cpp, llvm/test/CodeGen/AMDGPU bf16.ll

rebase

Created using spr 1.3.5-bogner
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,194-3,880llvm/test/CodeGen/AMDGPU/bf16.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
+309-5,049lldb/tools/lldb-dap/lldb-dap.cpp
+90,138-8,9294,327 files not shown
+283,321-85,4414,333 files

LLVM/project 519ae24llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/nest-base' into users/chapuni/mcdc/nest/trunk
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+102,453-36,85810,567 files not shown
+953,290-609,13410,573 files

LLVM/project 03c851allvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/bitmapaddr' into users/chapuni/mcdc/nest/nest-base

Conflicts:
        clang/test/CoverageMapping/mcdc-single-cond.cpp
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+102,453-36,85810,567 files not shown
+953,290-609,13410,573 files

LLVM/project d6cb61allvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/bitmapaddr
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+102,453-36,85810,567 files not shown
+953,323-609,04210,573 files

LLVM/project 457cf4bllvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/mcdcstate
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+102,453-36,85810,567 files not shown
+953,323-609,04210,573 files

LLVM/project aac9c6dllvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/lnot
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+102,453-36,85810,566 files not shown
+953,289-609,12910,572 files

LLVM/project e57bdccllvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/expect
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+102,453-36,85810,566 files not shown
+953,289-609,12910,572 files

LLVM/project 9a175d0llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'main' into users/chapuni/mcdc/nest/tests
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+102,453-36,85810,565 files not shown
+953,289-609,03210,571 files

LLVM/project 967dc03llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

run 'git merge main'
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+102,453-36,8588,560 files not shown
+809,659-558,2578,566 files

LLVM/project f8b734fllvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

fix order

Created using spr 1.3.4
DeltaFile
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+43,825-43,8257,407 files not shown
+681,199-531,6487,413 files

LLVM/project 41056e8llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]
DeltaFile
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+43,825-43,8257,401 files not shown
+681,165-531,6217,407 files

LLVM/project c122241lldb/tools/lldb-dap lldb-dap.cpp, llvm/test/CodeGen/AMDGPU bf16.ll atomic_optimizations_global_pointer.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]
DeltaFile
+7,194-3,880llvm/test/CodeGen/AMDGPU/bf16.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
+272-5,007lldb/tools/lldb-dap/lldb-dap.cpp
+4,269-28llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
+28,775-8,9151,280 files not shown
+84,457-34,5731,286 files

LLVM/project a9bf1f2flang/test/Lower allocatable-assignment.f90 array-expression.f90, lldb/tools/lldb-dap lldb-dap.cpp

rebase

Created using spr 1.3.4
DeltaFile
+7,163-3,829llvm/test/CodeGen/AMDGPU/bf16.ll
+4,269-28llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
+249-2,316lldb/tools/lldb-dap/lldb-dap.cpp
+2,163-0llvm/test/CodeGen/X86/vector-lrint-f16.ll
+190-1,086flang/test/Lower/allocatable-assignment.f90
+0-1,265flang/test/Lower/array-expression.f90
+14,034-8,5241,008 files not shown
+53,160-26,4091,014 files

LLVM/project 0cfee98llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

Rebase

Created using spr 1.3.5
DeltaFile
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+43,825-43,8254,283 files not shown
+513,606-420,7004,289 files

LLVM/project 14072a4clang/test/Driver mips-fsf.cpp, lldb/tools/lldb-dap lldb-dap.cpp EventHelper.cpp

fallback to default

Created using spr 1.3.4
DeltaFile
+15-2,176lldb/tools/lldb-dap/lldb-dap.cpp
+607-5llvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll
+240-240clang/test/Driver/mips-fsf.cpp
+415-0lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
+339-0llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
+238-0lldb/tools/lldb-dap/EventHelper.cpp
+1,854-2,421157 files not shown
+5,441-3,553163 files

LLVM/project 1434e11clang/test/Driver mips-fsf.cpp, lldb/tools/lldb-dap lldb-dap.cpp EventHelper.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]
DeltaFile
+15-2,176lldb/tools/lldb-dap/lldb-dap.cpp
+607-5llvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll
+240-240clang/test/Driver/mips-fsf.cpp
+415-0lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
+339-0llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
+238-0lldb/tools/lldb-dap/EventHelper.cpp
+1,854-2,421156 files not shown
+5,439-3,551162 files

LLVM/project af42b11llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

rebase

Created using spr 1.3.4
DeltaFile
+7,782-7,782llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+43,825-43,8254,198 files not shown
+510,585-434,2364,204 files

LLVM/project 96c7233llvm/test/CodeGen/AArch64 arm64-early-ifcvt.ll, llvm/test/CodeGen/AMDGPU dagcomb-shuffle-vecextend-non2.ll

[llvm] Remove `br i1 undef` from some `llvm/test/CodeGen` tests (#128272)

DeltaFile
+4-4llvm/test/CodeGen/X86/remat-fold-load.ll
+3-3llvm/test/CodeGen/AArch64/arm64-early-ifcvt.ll
+3-3llvm/test/CodeGen/X86/phi-bit-propagation.ll
+3-2llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
+2-2llvm/test/CodeGen/X86/pr18846.ll
+2-2llvm/test/CodeGen/X86/misched-aa-mmos.ll
+17-168 files not shown
+29-2814 files

LLVM/project ad220d9clang/test/OpenMP target_teams_distribute_parallel_for_simd_schedule_codegen.cpp teams_distribute_parallel_for_simd_schedule_codegen.cpp, llvm/test/CodeGen/X86 large-gep-chain.ll

Merge commit 'e2d1e2183a9615c669392eefcfe632cc0b59a649' into users/meinersbur/irbuilder-extract
DeltaFile
+0-116,484llvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt
+0-115,677llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
+0-98,954llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
+25,277-25,277llvm/test/CodeGen/X86/large-gep-chain.ll
+9,540-24,668clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
+9,364-24,292clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
+44,181-405,35242,672 files not shown
+3,761,432-2,721,70342,678 files

LLVM/project 2f448bfllvm/test/CodeGen/X86 avx512vl-vec-masked-cmp.ll Atomics-64.ll

[X86] Migrate tests to use opaque pointers (NFC)

Test updates were performed using:
https://gist.github.com/nikic/98357b71fd67756b0f064c9517b62a34

These are only the test updates where the test passed without
further modification (which is almost all of them, as the backend
is largely pointer-type agnostic).
DeltaFile
+984-984llvm/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll
+717-885llvm/test/CodeGen/X86/Atomics-64.ll
+601-601llvm/test/CodeGen/X86/negate-add-zero.ll
+456-579llvm/test/CodeGen/X86/stack-protector.ll
+498-518llvm/test/CodeGen/X86/addcarry.ll
+506-508llvm/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
+3,762-4,0752,599 files not shown
+48,390-50,8302,605 files

LLVM/project 2c2a7bbclang/test/Analysis/Inputs/expected-plists retain-release.m.objcpp.plist retain-release.m.objc.plist, lldb/www/python_reference lldb-pysrc.html _lldb'-module.html

Merge community 'master' into HighTec htc/master
DeltaFile
+131,121-0llvm/test/MC/AMDGPU/gfx10_asm_all.s
+98,845-0llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
+0-76,576lldb/www/python_reference/lldb-pysrc.html
+0-35,247lldb/www/python_reference/_lldb'-module.html
+26,304-0clang/test/Analysis/Inputs/expected-plists/retain-release.m.objcpp.plist
+26,235-0clang/test/Analysis/Inputs/expected-plists/retain-release.m.objc.plist
+282,505-111,82349,584 files not shown
+3,612,145-1,757,40149,590 files

LLVM/project b7cef81llvm/include/llvm/CodeGen CommandFlags.inc, llvm/lib/CodeGen TargetOptionsImpl.cpp

Replace "no-frame-pointer-*" function attributes with "frame-pointer"

Part of the effort to refactoring frame pointer code generation. We used
to use two function attributes "no-frame-pointer-elim" and
"no-frame-pointer-elim-non-leaf" to represent three kinds of frame
pointer usage: (all) frames use frame pointer, (non-leaf) frames use
frame pointer, (none) frame use frame pointer. This CL makes the idea
explicit by using only one enum function attribute "frame-pointer"

Option "-frame-pointer=" replaces "-disable-fp-elim" for tools such as
llc.

"no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" are still
supported for easy migration to "frame-pointer".

tests are mostly updated with

// replace command line args ‘-disable-fp-elim=false’ with ‘-frame-pointer=none’
grep -iIrnl '\-disable-fp-elim=false' * | xargs sed -i '' -e "s/-disable-fp-elim=false/-frame-pointer=none/g"

    [9 lines not shown]
DeltaFile
+45-45llvm/test/CodeGen/ARM/build-attributes.ll
+25-6llvm/lib/CodeGen/TargetOptionsImpl.cpp
+13-13llvm/test/CodeGen/ARM/debug-frame.ll
+18-7llvm/include/llvm/CodeGen/CommandFlags.inc
+12-12llvm/test/CodeGen/ARM/ehabi.ll
+8-8llvm/test/CodeGen/PowerPC/Frames-leaf.ll
+121-91148 files not shown
+331-300154 files

LLVM/project 1e68724llvm/test/Analysis/BasicAA cs-cs.ll, llvm/test/CodeGen/AMDGPU lds-alignment.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

Summary:
 This is a resurrection of work first proposed and discussed in Aug 2015:
   http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
and initially landed (but then backed out) in Nov 2015:
   http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html

 The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument
which is required to be a constant integer. It represents the alignment of the
dest (and source), and so must be the minimum of the actual alignment of the
two.

 This change is the first in a series that allows source and dest to each
have their own alignments by using the alignment attribute on their arguments.

 In this change we:
1) Remove the alignment argument.
2) Add alignment attributes to the source & dest arguments. We, temporarily,

    [54 lines not shown]
DeltaFile
+106-106llvm/test/Analysis/BasicAA/cs-cs.ll
+85-85llvm/test/Transforms/SROA/basictest.ll
+82-82llvm/test/CodeGen/SystemZ/memset-03.ll
+82-82llvm/test/CodeGen/SystemZ/memset-04.ll
+64-64llvm/test/CodeGen/AMDGPU/lds-alignment.ll
+51-51llvm/test/Transforms/MemCpyOpt/memset-memcpy-redundant-memset.ll
+470-470389 files not shown
+2,410-2,281395 files

LLVM/project 67cf9a7llvm/test/Analysis/BasicAA cs-cs.ll, llvm/test/CodeGen/ARM memfunc.ll

Revert "Change memcpy/memset/memmove to have dest and source alignments."

This reverts commit r253511.

This likely broke the bots in
http://lab.llvm.org:8011/builders/clang-ppc64-elf-linux2/builds/20202
http://bb.pgr.jp/builders/clang-3stage-i686-linux/builds/3787

llvm-svn: 253543
DeltaFile
+96-96llvm/test/Analysis/BasicAA/cs-cs.ll
+83-83llvm/test/Transforms/SROA/basictest.ll
+51-51llvm/test/Transforms/MemCpyOpt/memset-memcpy-redundant-memset.ll
+43-43llvm/test/CodeGen/ARM/memfunc.ll
+42-42llvm/test/CodeGen/SystemZ/memset-04.ll
+42-42llvm/test/CodeGen/SystemZ/memset-03.ll
+357-357288 files not shown
+1,653-1,820294 files

LLVM/project 72bc23ellvm/test/Analysis/BasicAA cs-cs.ll, llvm/test/CodeGen/ARM memfunc.ll

Change memcpy/memset/memmove to have dest and source alignments.

Note, this was reviewed (and more details are in) http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html

These intrinsics currently have an explicit alignment argument which is
required to be a constant integer.  It represents the alignment of the
source and dest, and so must be the minimum of those.

This change allows source and dest to each have their own alignments
by using the alignment attribute on their arguments.  The alignment
argument itself is removed.

There are a few places in the code for which the code needs to be
checked by an expert as to whether using only src/dest alignment is
safe.  For those places, they currently take the minimum of src/dest
alignments which matches the current behaviour.

For example, code which used to read:
  call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 500, i32 8, i1 false)

    [30 lines not shown]
DeltaFile
+96-96llvm/test/Analysis/BasicAA/cs-cs.ll
+83-83llvm/test/Transforms/SROA/basictest.ll
+51-51llvm/test/Transforms/MemCpyOpt/memset-memcpy-redundant-memset.ll
+43-43llvm/test/CodeGen/ARM/memfunc.ll
+42-42llvm/test/CodeGen/SystemZ/memset-03.ll
+42-42llvm/test/CodeGen/SystemZ/memset-04.ll
+357-357288 files not shown
+1,820-1,653294 files

LLVM/project a79ac14llvm/test/CodeGen/AArch64 arm64-vshift.ll arm64-vmul.ll, llvm/test/CodeGen/ARM 2009-07-18-RewriterBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to load instruction

Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

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DeltaFile
+384-384llvm/test/CodeGen/X86/vselect-minmax.ll
+304-304llvm/test/CodeGen/AArch64/arm64-vshift.ll
+265-265llvm/test/CodeGen/Mips/hf16call32.ll
+256-256llvm/test/CodeGen/Generic/APIntLoadStore.ll
+223-223llvm/test/CodeGen/AArch64/arm64-vmul.ll
+221-221llvm/test/CodeGen/ARM/2009-07-18-RewriterBug.ll
+1,653-1,6533,925 files not shown
+29,316-29,2923,931 files

LLVM/project 79e6c74llvm/test/CodeGen/AArch64 arm64-indexed-vector-ldst.ll, llvm/test/CodeGen/ARM 2009-07-18-RewriterBug.ll

[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction

One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.

This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.

* This doesn't modify gep operators, only instructions (operators will be
  handled separately)

* Textual IR changes only. Bitcode (including upgrade) and changing the
  in-memory representation will be in separate changes.

* geps of vectors are transformed as:
    getelementptr <4 x float*> %x, ...
  ->getelementptr float, <4 x float*> %x, ...
  Then, once the opaque pointer type is introduced, this will ultimately look

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DeltaFile
+25,268-25,268llvm/test/CodeGen/X86/large-gep-chain.ll
+676-676llvm/test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll
+610-610llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
+384-384llvm/test/CodeGen/X86/vselect-minmax.ll
+230-230llvm/test/Transforms/SROA/basictest.ll
+212-212llvm/test/CodeGen/ARM/2009-07-18-RewriterBug.ll
+27,380-27,3802,271 files not shown
+41,849-41,8192,277 files