LLVM / project - FreshBSD

LLVM/project 552f6c9 — llvm/test/CodeGen/X86 vector-interleaved-store-i8-stride-7.ll vector-interleaved-store-i16-stride-6.ll, llvm/test/Instrumentation/MemorySanitizer/AArch64 arm64-ld1.ll

users/fmayer/spr/mte-generalize-overalignment-size-of-mte-globals

rebase

Created using spr 1.3.4

Delta		File
+3,128	-3,170	llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
+2,487	-2,510	llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+2,099	-2,096	llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
+2,053	-2,052	llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop2.txt
+3,860	-0	llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-ld1.ll
+1,716	-1,780	llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
+15,343	-11,608	4,566 files not shown
+159,258	-104,313	4,572 files

LLVM/project 85e290b — llvm/test/CodeGen/AMDGPU bf16.ll, llvm/test/CodeGen/NVPTX cmpxchg-sm90.ll cmpxchg-sm70.ll

2 days ago by Michael Kruse on ⎇

users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME

Merge branch 'main' into users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME

Delta		File
+65,595	-0	llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,350	-4,196	llvm/test/CodeGen/AMDGPU/bf16.ll
+6,173	-0	llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
+0	-6,173	llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
+5,680	-0	llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
+5,680	-0	llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
+90,478	-10,369	6,999 files not shown
+425,286	-177,378	7,005 files

LLVM/project 2c57c89 — llvm/test/Analysis/CostModel/AArch64 arith-widening.ll, llvm/test/CodeGen/RISCV qci-interrupt-attr.ll

3 days ago by Helena Kotas on ⎇

users/hekota/pr-130338-remove-old-res-middle

Merge branch 'main' of https://github.com/llvm/llvm-project into remove-old-res-middle

Delta		File
+2,099	-2,096	llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
+2,053	-2,052	llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop2.txt
+1,434	-1,828	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
+2,915	-0	llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
+1,434	-1,418	llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
+940	-1,896	llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
+10,875	-9,290	2,274 files not shown
+97,298	-62,357	2,280 files

LLVM/project dc66ca4 — llvm/test/CodeGen/AMDGPU llvm.amdgcn.smfmac.gfx950.ll, llvm/test/CodeGen/RISCV xqccmp-push-pop-popret.ll

5 days ago by Alexey Bataev on ⎇

users/alexey-bataev/spr/lvfiximprove-max-safe-distance-analysis

Rebase, address comments

Created using spr 1.3.5

Delta		File
+0	-6,173	llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
+6,173	-0	llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
+3,951	-0	llvm/test/CodeGen/RISCV/xqccmp-push-pop-popret.ll
+3,860	-0	llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-ld1.ll
+1,746	-1,734	llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
+1,348	-1,952	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
+17,078	-9,859	2,714 files not shown
+131,118	-67,392	2,720 files

LLVM/project d4e79af — llvm/test/CodeGen/AMDGPU global_atomics_scan_fsub.ll global_atomics_scan_fadd.ll, llvm/test/CodeGen/RISCV qci-interrupt-attr.ll qci-interrupt-attr-fpr.ll

5 days ago by Krzysztof Parzyszek via GitHub on ⎇

users/kparzysz/spr/o03-cancel-directive-name

Merge branch 'main' into users/kparzysz/spr/o03-cancel-directive-name

Delta		File
+2,927	-0	llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
+2,821	-0	llvm/test/CodeGen/RISCV/qci-interrupt-attr-fpr.ll
+1,246	-1,246	llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
+1,246	-1,246	llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
+1,214	-1,214	llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
+1,214	-1,214	llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
+10,668	-4,920	1,301 files not shown
+51,893	-31,213	1,307 files

LLVM/project 7dc7264 — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

6 days ago by yangzhaoxin on ⎇

users/ylzsx/r-tls-noie

Merge branch 'main' into users/ylzsx/r-tls-noie

Delta		File
+65,595	-0	llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+29,745	-0	llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655	-0	llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,655	-0	llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,139	-0	llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933	-0	llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
+203,722	-0	16,100 files not shown
+2,040,184	-604,855	16,106 files

LLVM/project d19218e — llvm/lib/CodeGen/SelectionDAG LegalizeTypes.cpp LegalizeDAG.cpp, llvm/test/CodeGen/AArch64 fp16_fast_math.ll

8 days ago by John Brawn via GitHub on ⎇

main

[SelectionDAG] Preserve fast math flags when legalizing/promoting (#130124)

When we have a floating-point operation that a target doesn't support
for a given type, but does support for a wider type, then there are two
ways this can be handled:

* If the target doesn't have any registers at all of this type then
LegalizeTypes will convert the operation.

* If we do have registers but no operation for this type, then the
operation action will be Promote and it's handled in PromoteNode.

In both cases the operation at the wider type, and the conversion
operations to and from that type, should have the same fast math flags
as the original operation.

This is being done in preparation for a DAGCombine patch which makes use
of these fast math flags.

Delta		File
+112	-0	llvm/test/CodeGen/ARM/fp16_fast_math.ll
+90	-0	llvm/test/CodeGen/AArch64/fp16_fast_math.ll
+26	-14	llvm/test/CodeGen/ARM/vecreduce-fmax-legalization-soft-float.ll
+26	-14	llvm/test/CodeGen/ARM/vecreduce-fmin-legalization-soft-float.ll
+4	-0	llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
+3	-0	llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+261	-28	1 files not shown
+263	-28	7 files