LLVM/project 7dc7264 — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll
Merge branch 'main' into users/ylzsx/r-tls-noie
Merge branch 'main' into users/ylzsx/r-tls-noie
Merge branch 'users/chapuni/mcdc/nest/nest-base' into users/chapuni/mcdc/nest/trunk
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+102,453 | -36,858 | 10,567 files not shown |
+953,290 | -609,134 | 10,573 files |
Merge branch 'users/chapuni/mcdc/nest/bitmapaddr' into users/chapuni/mcdc/nest/nest-base Conflicts: clang/test/CoverageMapping/mcdc-single-cond.cpp
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+102,453 | -36,858 | 10,567 files not shown |
+953,290 | -609,134 | 10,573 files |
Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/bitmapaddr
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+102,453 | -36,858 | 10,567 files not shown |
+953,323 | -609,042 | 10,573 files |
Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/mcdcstate
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+102,453 | -36,858 | 10,567 files not shown |
+953,323 | -609,042 | 10,573 files |
Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/lnot
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+102,453 | -36,858 | 10,566 files not shown |
+953,289 | -609,129 | 10,572 files |
Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/expect
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+102,453 | -36,858 | 10,566 files not shown |
+953,289 | -609,129 | 10,572 files |
Merge branch 'main' into users/chapuni/mcdc/nest/tests
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+102,453 | -36,858 | 10,565 files not shown |
+953,289 | -609,032 | 10,571 files |
run 'git merge main'
Delta | File | |
---|---|---|
+65,595 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll |
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+102,453 | -36,858 | 8,560 files not shown |
+809,659 | -558,257 | 8,566 files |
fix order Created using spr 1.3.4
Delta | File | |
---|---|---|
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+43,825 | -43,825 | 7,407 files not shown |
+681,199 | -531,648 | 7,413 files |
[𝘀𝗽𝗿] changes introduced through rebase Created using spr 1.3.4 [skip ci]
Delta | File | |
---|---|---|
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+43,825 | -43,825 | 7,401 files not shown |
+681,165 | -531,621 | 7,407 files |
Rebase Created using spr 1.3.5
Delta | File | |
---|---|---|
+7,782 | -7,782 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+43,825 | -43,825 | 4,283 files not shown |
+513,606 | -420,700 | 4,289 files |
refactor Created using spr 1.3.4
Delta | File | |
---|---|---|
+30,641 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+27,655 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+27,655 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+27,139 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+25,933 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll |
+25,933 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll |
+164,956 | -0 | 15,561 files not shown |
+1,914,489 | -576,768 | 15,567 files |
Address @DavidSpickett's comment Created using spr 1.3.5-bogner
Delta | File | |
---|---|---|
+7,513 | -7,513 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+43,556 | -43,556 | 6,429 files not shown |
+608,030 | -497,429 | 6,435 files |
Merge branch 'main' into users/ylzsx/r-call36
Delta | File | |
---|---|---|
+30,641 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+27,655 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+27,655 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+27,139 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+25,933 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll |
+25,933 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll |
+164,956 | -0 | 10,990 files not shown |
+1,581,431 | -416,524 | 10,996 files |
Merge branch 'main' of https://github.com/llvm/llvm-project into cbuffer-codegen5
Delta | File | |
---|---|---|
+20,021 | -0 | llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll |
+7,513 | -7,513 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+56,610 | -36,589 | 8,229 files not shown |
+698,110 | -527,440 | 8,235 files |
Merge branch 'test/adding-missing-test' into obj2yaml/root-constants
Delta | File | |
---|---|---|
+7,513 | -7,513 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+43,556 | -43,556 | 3,452 files not shown |
+431,676 | -408,043 | 3,458 files |
[TableGen] Emit OpName as an enum class instead of a namespace (#125313) - Change InstrInfoEmitter to emit OpName as an enum class instead of an anonymous enum in the OpName namespace. - This will help clearly distinguish between values that are OpNames vs just operand indices and should help avoid bugs due to confusion between the two. - Rename OpName::OPERAND_LAST to NUM_OPERAND_NAMES. - Emit declaration of getOperandIdx() along with the OpName enum so it doesn't have to be repeated in various headers. - Also updated AMDGPU, RISCV, and WebAssembly backends to conform to the new definition of OpName (mostly mechanical changes).
Rebase Created using spr 1.3.5
Delta | File | |
---|---|---|
+7,513 | -7,513 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+7,427 | -7,427 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+7,255 | -7,255 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll |
+6,967 | -6,967 | llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll |
+43,556 | -43,556 | 1,547 files not shown |
+371,601 | -354,865 | 1,553 files |
Merge branch 'users/meinersbur/flang_runtime_shared' into users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME
Merge branch 'users/meinersbur/flang_runtime' into users/meinersbur/flang_runtime_shared
Merge branch 'users/meinersbur/flang_runtime_move-files' into users/meinersbur/flang_runtime
Merge commit 'c6654806949f0498fdd2d009b66e62041c21de36' into users/meinersbur/flang_runtime_move-files
rebase Created using spr 1.3.4
Delta | File | |
---|---|---|
+30,641 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll |
+27,655 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll |
+27,655 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll |
+27,139 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll |
+25,933 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll |
+25,933 | -0 | llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll |
+164,956 | -0 | 14,444 files not shown |
+1,781,638 | -474,012 | 14,450 files |
relnote Created using spr 1.3.4
Delta | File | |
---|---|---|
+2,400 | -2,440 | llvm/test/CodeGen/RISCV/atomic-rmw.ll |
+2,237 | -2,031 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll |
+1,572 | -1,618 | llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll |
+2,764 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions/cl_khr_extended_bit_ops.ll |
+1,049 | -1,175 | clang/lib/CodeGen/CGObjCMac.cpp |
+1,984 | -0 | llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-lsfe.ll |
+12,006 | -7,264 | 1,200 files not shown |
+59,235 | -40,600 | 1,206 files |
[𝘀𝗽𝗿] changes introduced through rebase Created using spr 1.3.4 [skip ci]
Delta | File | |
---|---|---|
+2,400 | -2,440 | llvm/test/CodeGen/RISCV/atomic-rmw.ll |
+2,237 | -2,031 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll |
+1,572 | -1,618 | llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll |
+2,764 | -0 | llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions/cl_khr_extended_bit_ops.ll |
+1,049 | -1,175 | clang/lib/CodeGen/CGObjCMac.cpp |
+1,984 | -0 | llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-v8a_fp.ll |
+12,006 | -7,264 | 1,200 files not shown |
+59,235 | -40,600 | 1,206 files |
[TableGen] Emit OpName as an enum class instead of a namespace (#125313) - Change InstrInfoEmitter to emit OpName as an enum class instead of an anonymous enum in the OpName namespace. - This will help clearly distinguish between values that are OpNames vs just operand indices and should help avoid bugs due to confusion between the two. - Rename OpName::OPERAND_LAST to NUM_OPERAND_NAMES. - Emit declaration of getOperandIdx() along with the OpName enum so it doesn't have to be repeated in various headers. - Also updated AMDGPU, RISCV, and WebAssembly backends to conform to the new definition of OpName (mostly mechanical changes).
Rebase Created using spr 1.3.6-beta.1
Delta | File | |
---|---|---|
+17,258 | -17,152 | llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll |
+17,258 | -17,152 | llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll |
+14,327 | -17,447 | llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll |
+14,327 | -17,447 | llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll |
+12,923 | -11,789 | llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll |
+12,923 | -11,789 | llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll |
+89,016 | -92,776 | 45,766 files not shown |
+4,106,333 | -2,097,168 | 45,772 files |
Merge branch 'main' into users/chapuni/cov/single/replace
Delta | File | |
---|---|---|
+16,880 | -2,842 | llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll |
+19,618 | -0 | llvm/test/CodeGen/RISCV/rvv/expandload.ll |
+17,418 | -0 | clang/test/CodeGen/AArch64/neon-intrinsics.c |
+0 | -17,418 | clang/test/CodeGen/aarch64-neon-intrinsics.c |
+16,049 | -0 | llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll |
+12,081 | -2,450 | llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll |
+82,046 | -22,710 | 26,925 files not shown |
+2,067,496 | -1,063,533 | 26,931 files |
Merge branch 'main' into users/chapuni/cov/single/pair
Delta | File | |
---|---|---|
+16,880 | -2,842 | llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll |
+19,618 | -0 | llvm/test/CodeGen/RISCV/rvv/expandload.ll |
+17,418 | -0 | clang/test/CodeGen/AArch64/neon-intrinsics.c |
+0 | -17,418 | clang/test/CodeGen/aarch64-neon-intrinsics.c |
+16,049 | -0 | llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll |
+12,081 | -2,450 | llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll |
+82,046 | -22,710 | 26,925 files not shown |
+2,067,496 | -1,063,533 | 26,931 files |