LLVM/project 01430c0clang/test/CodeGen attr-riscv-rvv-vector-bits-types.c, clang/test/CodeGen/RISCV attr-rvv-vector-bits-types.c

rebase

Created using spr 1.3.4
DeltaFile
+638-2,826llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
+414-2,200llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
+0-2,486llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-compares.ll
+0-2,054clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c
+2,054-0clang/test/CodeGen/RISCV/attr-rvv-vector-bits-types.c
+1,408-620llvm/test/CodeGen/AArch64/vector-lrint.ll
+4,514-10,1861,539 files not shown
+72,122-69,2141,545 files

LLVM/project ff6b4c1clang/test/CodeGen attr-riscv-rvv-vector-bits-types.c, clang/test/CodeGen/RISCV attr-rvv-vector-bits-types.c

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]
DeltaFile
+638-2,826llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
+414-2,200llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
+0-2,486llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-compares.ll
+2,054-0clang/test/CodeGen/RISCV/attr-rvv-vector-bits-types.c
+0-2,054clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c
+1,408-620llvm/test/CodeGen/AArch64/vector-lrint.ll
+4,514-10,1861,539 files not shown
+72,122-69,2141,545 files

LLVM/project 449f5a1clang/test/CodeGen attr-riscv-rvv-vector-bits-types.c, clang/test/CodeGen/RISCV attr-rvv-vector-bits-types.c

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]
DeltaFile
+638-2,826llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
+414-2,200llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
+0-2,486llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-compares.ll
+2,054-0clang/test/CodeGen/RISCV/attr-rvv-vector-bits-types.c
+0-2,054clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c
+1,408-620llvm/test/CodeGen/AArch64/vector-lrint.ll
+4,514-10,1861,539 files not shown
+72,122-69,2141,545 files

LLVM/project b8425a4llvm/test/CodeGen/AMDGPU llvm.maximum.f64.ll llvm.minimum.f64.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i32-stride-7.ll vector-interleaved-load-i32-stride-6.ll

Avoid the revert

Created using spr 1.3.4
DeltaFile
+3,380-3,509llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
+3,154-3,545llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
+6,487-0llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
+6,487-0llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
+4,993-0llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
+4,551-0llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
+29,052-7,0543,276 files not shown
+129,642-54,7333,282 files

LLVM/project eecff96llvm/test/CodeGen/AMDGPU llvm.maximum.f64.ll llvm.minimum.f64.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i32-stride-7.ll vector-interleaved-load-i32-stride-6.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]
DeltaFile
+3,380-3,509llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
+3,154-3,545llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
+6,487-0llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
+6,487-0llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
+4,993-0llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
+4,551-0llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
+29,052-7,0543,275 files not shown
+129,657-54,7313,281 files

LLVM/project 96fa240clang/test/OpenMP nesting_of_regions.cpp, clang/test/OpenMP/Inputs nesting_of_regions.cpp

Merge branch 'upstream/main' into ptrauth-auth-resign-isel
DeltaFile
+13,404-6,344llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
+0-19,580clang/test/OpenMP/nesting_of_regions.cpp
+19,567-0clang/test/OpenMP/Inputs/nesting_of_regions.cpp
+12,949-6,549llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
+12,712-6,088llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
+12,041-6,669llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
+70,673-45,23014,521 files not shown
+1,047,527-493,40214,527 files

LLVM/project f7549e4clang/test/OpenMP nesting_of_regions.cpp, clang/test/OpenMP/Inputs nesting_of_regions.cpp

rebase on main

Created using spr 1.3.4
DeltaFile
+13,404-6,344llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
+0-19,580clang/test/OpenMP/nesting_of_regions.cpp
+19,567-0clang/test/OpenMP/Inputs/nesting_of_regions.cpp
+12,949-6,549llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
+12,712-6,088llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
+12,041-6,669llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
+70,673-45,23011,553 files not shown
+795,588-409,09911,559 files

LLVM/project 41844eellvm/test/CodeGen/AMDGPU llvm.maximum.f16.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i32-stride-7.ll vector-interleaved-load-i32-stride-6.ll

final rebase and tweak

Created using spr 1.3.4
DeltaFile
+3,380-3,509llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
+3,154-3,545llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
+1,821-1,911llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
+1,787-1,763llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
+642-2,830llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
+1,020-1,708llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
+11,804-15,2663,438 files not shown
+78,126-71,5593,444 files

LLVM/project de578a5llvm/test/CodeGen/AMDGPU llvm.maximum.f16.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i32-stride-7.ll vector-interleaved-load-i32-stride-6.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]
DeltaFile
+3,380-3,509llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
+3,154-3,545llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
+1,821-1,911llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
+1,787-1,763llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
+642-2,830llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
+1,020-1,708llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
+11,804-15,2663,437 files not shown
+78,125-71,5583,443 files

LLVM/project 5c62c58llvm/test/CodeGen/AMDGPU llvm.maximum.f16.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i32-stride-7.ll vector-interleaved-load-i32-stride-6.ll

final rebase and tweak

Created using spr 1.3.4
DeltaFile
+3,380-3,509llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
+3,154-3,545llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
+1,821-1,911llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
+1,787-1,763llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
+642-2,830llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
+1,020-1,708llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
+11,804-15,2663,437 files not shown
+78,125-71,5583,443 files

LLVM/project e730587llvm/test/CodeGen/AMDGPU llvm.maximum.f16.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i32-stride-7.ll vector-interleaved-load-i32-stride-6.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]
DeltaFile
+3,380-3,509llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
+3,154-3,545llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
+1,821-1,911llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
+1,787-1,763llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
+642-2,830llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
+1,020-1,708llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
+11,804-15,2663,435 files not shown
+78,120-71,5533,441 files

LLVM/project 585f0d6llvm/test/CodeGen/AMDGPU llvm.maximum.f16.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i32-stride-7.ll vector-interleaved-load-i32-stride-6.ll

final rebase and tweak

Created using spr 1.3.4
DeltaFile
+3,380-3,509llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
+3,154-3,545llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
+1,821-1,911llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
+1,787-1,763llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
+642-2,830llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
+1,020-1,708llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
+11,804-15,2663,435 files not shown
+78,120-71,5533,441 files

LLVM/project d34b199llvm/test/CodeGen/AMDGPU llvm.maximum.f16.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i32-stride-7.ll vector-interleaved-load-i32-stride-6.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]
DeltaFile
+3,380-3,509llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
+3,154-3,545llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
+1,821-1,911llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
+1,787-1,763llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
+642-2,830llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
+1,020-1,708llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
+11,804-15,2663,435 files not shown
+78,120-71,5533,441 files

LLVM/project 6c30536llvm/test/CodeGen/AMDGPU llvm.maximum.f16.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i32-stride-7.ll vector-interleaved-load-i32-stride-6.ll

final rebase and tweak

Created using spr 1.3.4
DeltaFile
+3,380-3,509llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
+3,154-3,545llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
+1,821-1,911llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
+1,787-1,763llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
+642-2,830llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
+1,020-1,708llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
+11,804-15,2663,435 files not shown
+78,120-71,5533,441 files

LLVM/project f52ca63llvm/test/Analysis/LoopAccessAnalysis multiple-strides-rt-memory-checks.ll

[LAA] Drop x86_64 target triple to fix test on builds with X86.

Follow-up o fix test after 28767afd53353d9333b0adf6f0fafa1592092532.
DeltaFile
+1-2llvm/test/Analysis/LoopAccessAnalysis/multiple-strides-rt-memory-checks.ll
+1-21 files

LLVM/project 28767afllvm/include/llvm/Analysis LoopAccessAnalysis.h, llvm/lib/Analysis LoopAccessAnalysis.cpp

[LAA] Support backward dependences with non-constant distance. (#91525)

Following up to 933f49248, also update the code reasoning about
backwards dependences to support non-constant distances.

Update the code to use the signed minimum distance instead of a constant
distance

This means e checked the lower bound of the dependence distance and the
distance may be larger at runtime (and safe for vectorization). Whether
to classify it as Unknown or Backwards depends on the vector width and
LAA was updated to take TTI to get the maximum vector register width.

If the minimum dependence distance is larger than the max vector width,
we consider it as backwards-vectorizable. Otherwise we classify them as
Unknown, so we re-try with runtime checks.

PR: https://github.com/llvm/llvm-project/pull/91525
DeltaFile
+159-133llvm/test/Analysis/LoopAccessAnalysis/non-constant-distance-backward.ll
+67-26llvm/lib/Analysis/LoopAccessAnalysis.cpp
+17-6llvm/include/llvm/Analysis/LoopAccessAnalysis.h
+1-1llvm/lib/Transforms/Scalar/LoopFlatten.cpp
+1-1llvm/test/Analysis/LoopAccessAnalysis/multiple-strides-rt-memory-checks.ll
+1-1llvm/unittests/Transforms/Vectorize/VPlanSlpTest.cpp
+246-1681 files not shown
+247-1697 files

LLVM/project 3628696clang/include/clang/Sema Sema.h, clang/test/OpenMP nesting_of_regions.cpp

run 'git merge main'
DeltaFile
+14,980-5,704llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
+9,317-10,958clang/include/clang/Sema/Sema.h
+14,165-5,559llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
+14,216-5,464llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
+0-19,580clang/test/OpenMP/nesting_of_regions.cpp
+19,567-0clang/test/OpenMP/Inputs/nesting_of_regions.cpp
+72,245-47,26522,308 files not shown
+1,544,864-690,80622,314 files

LLVM/project 1218d5bllvm/test/CodeGen/AMDGPU memory-legalizer-global-agent.ll memory-legalizer-global-workgroup.ll

clang-format

Created using spr 1.3.5-bogner
DeltaFile
+13,404-6,344llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
+12,949-6,549llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
+12,712-6,088llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
+12,041-6,669llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
+12,041-6,669llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
+12,958-4,611llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
+76,105-36,9303,868 files not shown
+339,932-140,3483,874 files

LLVM/project 23affcallvm/test/CodeGen/AMDGPU memory-legalizer-global-agent.ll memory-legalizer-global-workgroup.ll

don't require .ifdef/.endif

Created using spr 1.3.5-bogner
DeltaFile
+13,404-6,344llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
+12,949-6,549llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
+12,712-6,088llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
+12,041-6,669llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
+12,041-6,669llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
+12,958-4,611llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
+76,105-36,9306,274 files not shown
+467,739-190,9136,280 files

LLVM/project 42df2c5clang/test/OpenMP nesting_of_regions.cpp, clang/test/OpenMP/Inputs nesting_of_regions.cpp

Merge branch 'upstream/main' into ptrauth-constant
DeltaFile
+13,404-6,344llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
+0-19,580clang/test/OpenMP/nesting_of_regions.cpp
+19,567-0clang/test/OpenMP/Inputs/nesting_of_regions.cpp
+12,949-6,549llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
+12,712-6,088llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
+12,041-6,669llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
+70,673-45,23014,521 files not shown
+1,047,528-493,40214,527 files

LLVM/project 3da9b8bllvm/test/CodeGen/AMDGPU memory-legalizer-global-agent.ll memory-legalizer-global-workgroup.ll

Merge branch 'users/minglotus-6/spr/summary1' into users/minglotus-6/spr/summary2
DeltaFile
+13,404-6,344llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
+12,949-6,549llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
+12,712-6,088llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
+12,041-6,669llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
+12,041-6,669llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
+12,958-4,611llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
+76,105-36,9308,542 files not shown
+603,257-274,0978,548 files

LLVM/project c5e168ellvm/test/CodeGen/AMDGPU memory-legalizer-global-agent.ll memory-legalizer-global-workgroup.ll

Merge branch 'main' into users/minglotus-6/spr/summary1
DeltaFile
+13,404-6,344llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
+12,949-6,549llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
+12,712-6,088llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
+12,041-6,669llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
+12,041-6,669llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
+12,958-4,611llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
+76,105-36,9308,539 files not shown
+603,234-274,0638,545 files

LLVM/project 3099ab6llvm/test/CodeGen/X86 vector-interleaved-load-i32-stride-7.ll vector-interleaved-load-i32-stride-6.ll

rebase on -analyze fixes: e4d242768aefabc0091dd01fabecaffbc2b6984b

Created using spr 1.3.5-bogner
DeltaFile
+3,380-3,509llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
+3,154-3,545llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
+1,821-1,911llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
+1,787-1,763llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
+1,020-1,708llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
+868-1,017llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-3.ll
+12,030-13,453296 files not shown
+21,332-17,206302 files

LLVM/project 8b8f7f6llvm/test/CodeGen/AMDGPU llvm.minimum.f64.ll llvm.maximum.f64.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i32-stride-7.ll vector-interleaved-load-i32-stride-6.ll

Merge branch 'main' into users/kparzysz/spr/d09-recurse
DeltaFile
+3,380-3,509llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
+3,154-3,545llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
+6,487-0llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
+6,487-0llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
+4,993-0llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
+4,551-0llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
+29,052-7,0541,991 files not shown
+60,501-25,1441,997 files

LLVM/project 148b721llvm/test/Analysis/LoopAccessAnalysis multiple-strides-rt-memory-checks.ll

[LAA] Update check line in test to fully match message.
DeltaFile
+1-1llvm/test/Analysis/LoopAccessAnalysis/multiple-strides-rt-memory-checks.ll
+1-11 files

LLVM/project 05dc149llvm/test/Analysis/LoopAccessAnalysis stride-access-dependence.ll pointer-phis.ll

[LAA] Convert tests to opaque pointers (NFC)
DeltaFile
+113-123llvm/test/Analysis/LoopAccessAnalysis/stride-access-dependence.ll
+117-117llvm/test/Analysis/LoopAccessAnalysis/pointer-phis.ll
+70-70llvm/test/Analysis/LoopAccessAnalysis/number-of-memchecks.ll
+42-49llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
+40-40llvm/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll
+31-31llvm/test/Analysis/LoopAccessAnalysis/symbolic-stride.ll
+413-43029 files not shown
+741-76435 files

LLVM/project 555e09cllvm/test/Analysis/LoopAccessAnalysis forked-pointers.ll pr56672.ll

[LAA] Rename printing pass to print<access-info>.

This updates the naming for the LAA printing pass to be in line with
most other analysis printing passes.

The old name has come up as confusing multiple times already, e.g. in
D131924.
DeltaFile
+2-2llvm/test/Analysis/LoopAccessAnalysis/forked-pointers.ll
+2-2llvm/test/Analysis/LoopAccessAnalysis/pr56672.ll
+1-1llvm/test/Analysis/LoopAccessAnalysis/non-wrapping-pointer.ll
+1-1llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types_opaque_ptr.ll
+1-1llvm/test/Analysis/LoopAccessAnalysis/reverse-memcheck-bounds.ll
+1-1llvm/test/Analysis/LoopAccessAnalysis/runtime-pointer-checking-insert-typesize.ll
+8-834 files not shown
+42-4240 files

LLVM/project 80a0c15clang/test/CodeGen/RISCV/rvv-intrinsics vloxseg.c vluxseg.c, clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded vloxseg.c vluxseg.c

Merge branch 'main' into irbuilder-extract-refactor
DeltaFile
+12,242-14,649llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+11,615-13,961llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
+2-24,936clang/test/CodeGen/RISCV/rvv-intrinsics/vloxseg.c
+2-24,936clang/test/CodeGen/RISCV/rvv-intrinsics/vluxseg.c
+2-21,307clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vloxseg.c
+2-21,307clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vluxseg.c
+23,865-121,09630,598 files not shown
+2,090,526-1,305,42030,604 files

LLVM/project 34de63cllvm/test/Analysis/LoopAccessAnalysis safe-with-dep-distance.ll depend_diff_types.ll

[test] Remove unnecessary require<> in LoopAccessAnalysis tests

These function analyses are always available in loop passes.
DeltaFile
+1-1llvm/test/Analysis/LoopAccessAnalysis/safe-with-dep-distance.ll
+1-1llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
+1-1llvm/test/Analysis/LoopAccessAnalysis/number-of-memchecks.ll
+1-1llvm/test/Analysis/LoopAccessAnalysis/multiple-strides-rt-memory-checks.ll
+1-1llvm/test/Analysis/LoopAccessAnalysis/safe-no-checks.ll
+1-1llvm/test/Analysis/LoopAccessAnalysis/pointer-phis.ll
+6-623 files not shown
+29-2929 files

LLVM/project 5015321llvm/test/Analysis/Dominators basic.ll, llvm/test/Analysis/IVUsers quadradic-exit-value.ll

[test][NewPM] Remove RUN lines using -analyze

Only tests in llvm/test/Analysis.

-analyze is legacy PM-specific.

This only touches files with `-passes`.

I looked through everything and made sure that everything had a new PM equivalent.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D109040
DeltaFile
+0-95llvm/test/Analysis/IVUsers/quadradic-exit-value.ll
+5-11llvm/test/Analysis/LoopAccessAnalysis/store-to-invariant-check1.ll
+3-6llvm/test/Analysis/Dominators/basic.ll
+1-5llvm/test/Analysis/RegionInfo/infinite_loop.ll
+0-5llvm/test/Analysis/RegionInfo/infinite_loop_3.ll
+0-5llvm/test/Analysis/RegionInfo/loop_with_condition.ll
+9-127367 files not shown
+9-570373 files