LLVM/project ff761f6llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

Merge branch 'users/meinersbur/flang_runtime_move-files' into users/meinersbur/flang_runtime
DeltaFile
+7,513-7,513llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
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+43,556-43,5561,183 files not shown
+355,173-350,5991,189 files

LLVM/project b12d925llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

Merge commit '660cdace559a8dbe44ebf2222b854bf3f39a5f62' into users/meinersbur/flang_runtime_move-files
DeltaFile
+7,513-7,513llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
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+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
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+43,556-43,5561,183 files not shown
+355,173-350,5991,189 files

LLVM/project 059722dllvm/test/CodeGen/RISCV atomic-rmw.ll atomic-signext.ll, llvm/test/CodeGen/RISCV/GlobalISel wide-scalar-shift-by-byte-multiple-legalization.ll

Revert "[RISCV] Default to MicroOpBufferSize = 1 for scheduling purposes (#126608)" and follow up commit.

This reverts commit 9cc8442a2b438962883bbbfd8ff62ad4b1a2b95d.
This reverts commit 859c871184bdfdebb47b5c7ec5e59348e0534e0b.

A performance regression was reported on the original review.  There appears
to have been an unexpected interaction here.  Reverting during investigation.
DeltaFile
+2,440-2,400llvm/test/CodeGen/RISCV/atomic-rmw.ll
+1,891-2,097llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
+1,632-1,586llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+861-804llvm/test/CodeGen/RISCV/rvv/expandload.ll
+648-642llvm/test/CodeGen/RISCV/atomic-signext.ll
+639-582llvm/test/CodeGen/RISCV/pr69586.ll
+8,111-8,111399 files not shown
+29,828-28,652405 files

LLVM/project f0b3fbdllvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

Rebase

Created using spr 1.3.5
DeltaFile
+7,513-7,513llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+7,427-7,427llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+7,255-7,255llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+6,967-6,967llvm/test/CodeGen/AMDGPU/shufflevector.v4p0.v4p0.ll
+43,556-43,5561,547 files not shown
+371,601-354,8651,553 files

LLVM/project b9ae94eclang/test/AST ast-dump-templates.cpp, llvm/test/CodeGen/AArch64 neon-dotreduce.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+20,021-0llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
+13,743-0llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
+3,087-8,187llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+6,045-2clang/test/AST/ast-dump-templates.cpp
+3,676-1,531llvm/test/CodeGen/AArch64/neon-dotreduce.ll
+57,554-9,7205,762 files not shown
+304,241-135,9965,768 files

LLVM/project 5211ad2clang/test/AST ast-dump-templates.cpp, llvm/test/CodeGen/AArch64 neon-dotreduce.ll

use fixed size for dynamic inst count

Created using spr 1.3.6-beta.1
DeltaFile
+20,021-0llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
+13,743-0llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
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+6,045-2clang/test/AST/ast-dump-templates.cpp
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+57,554-9,7205,764 files not shown
+304,247-136,0005,770 files

LLVM/project a63f09ellvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

rebase

Created using spr 1.3.4
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
+164,956-014,444 files not shown
+1,781,638-474,01214,450 files

LLVM/project f4d53b4clang/lib/CodeGen CGObjCMac.cpp, llvm/test/CodeGen/AArch64/Atomics aarch64_be-atomicrmw-lsfe.ll

relnote

Created using spr 1.3.4
DeltaFile
+2,400-2,440llvm/test/CodeGen/RISCV/atomic-rmw.ll
+2,237-2,031llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
+1,572-1,618llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+2,764-0llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions/cl_khr_extended_bit_ops.ll
+1,049-1,175clang/lib/CodeGen/CGObjCMac.cpp
+1,984-0llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-lsfe.ll
+12,006-7,2641,200 files not shown
+59,235-40,6001,206 files

LLVM/project c5e9141clang/lib/CodeGen CGObjCMac.cpp, llvm/test/CodeGen/AArch64/Atomics aarch64_be-atomicrmw-lsfe.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]
DeltaFile
+2,400-2,440llvm/test/CodeGen/RISCV/atomic-rmw.ll
+2,237-2,031llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
+1,572-1,618llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+2,764-0llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions/cl_khr_extended_bit_ops.ll
+1,049-1,175clang/lib/CodeGen/CGObjCMac.cpp
+1,984-0llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-lsfe.ll
+12,006-7,2641,200 files not shown
+59,235-40,6001,206 files

LLVM/project 2c4bdb2clang/test/AST ast-dump-templates.cpp, llvm/test/CodeGen/AArch64 neon-dotreduce.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+20,021-0llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
+13,743-0llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
+3,087-8,187llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
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+6,045-2clang/test/AST/ast-dump-templates.cpp
+3,676-1,531llvm/test/CodeGen/AArch64/neon-dotreduce.ll
+57,554-9,7205,761 files not shown
+304,233-135,9885,767 files

LLVM/project eaa1c39clang/test/AST ast-dump-templates.cpp, llvm/test/CodeGen/AArch64 neon-dotreduce.ll

use fixed size for DynamicInstCount

Created using spr 1.3.6-beta.1
DeltaFile
+20,021-0llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
+13,743-0llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
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+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+6,045-2clang/test/AST/ast-dump-templates.cpp
+3,676-1,531llvm/test/CodeGen/AArch64/neon-dotreduce.ll
+57,554-9,7205,762 files not shown
+304,245-135,9965,768 files

LLVM/project 859c871llvm/test/CodeGen/RISCV atomic-rmw.ll atomic-signext.ll, llvm/test/CodeGen/RISCV/GlobalISel wide-scalar-shift-by-byte-multiple-legalization.ll

[RISCV] Default to MicroOpBufferSize = 1 for scheduling purposes (#126608)

This change introduces a default schedule model for the RISCV target
which leaves everything unchanged except the MicroOpBufferSize. The
default value of this flag in NoSched is 0. Both configurations
represent in order cores (i.e. no reorder window), the difference
between them comes down to whether heuristics other than latency are
allowed to apply. (Implementation details below)

I left the processor models which explicitly set MicroOpBufferSize=0
unchanged in this patch, but strongly suspect we should change those
too. Honestly, I think the LLVM wide default for this flag should be
changed, but don't have the energy to manage the updates for all
targets.

Implementation wise, the effect of this change is that schedule units
which are ready to run *except that* one of their predecessors may not
have completed yet are added to the Available list, not the Pending one.
The result of this is that it becomes possible to chose to schedule a

    [18 lines not shown]
DeltaFile
+2,400-2,440llvm/test/CodeGen/RISCV/atomic-rmw.ll
+2,237-2,031llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
+1,572-1,618llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
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+642-648llvm/test/CodeGen/RISCV/atomic-signext.ll
+586-643llvm/test/CodeGen/RISCV/pr69586.ll
+8,231-8,231397 files not shown
+28,727-29,913403 files

LLVM/project 1a95648clang/test/AST ast-dump-templates.cpp, libcxx/test/libcxx/containers/associative tree_remove.pass.cpp

Rebase

Created using spr 1.3.5
DeltaFile
+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+6,045-2clang/test/AST/ast-dump-templates.cpp
+3,778-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vadd.ll
+3,412-0llvm/test/CodeGen/RISCV/GlobalISel/rotl-rotr.ll
+1,480-1,490libcxx/test/libcxx/containers/associative/tree_remove.pass.cpp
+2,885-51llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+28,582-1,5435,129 files not shown
+235,155-136,7225,135 files

LLVM/project e8a1dceclang/test/AST ast-dump-templates.cpp, llvm/test/CodeGen/AArch64 neon-dotreduce.ll

address feedback

Created using spr 1.3.6-beta.1
DeltaFile
+20,021-0llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
+13,743-0llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
+3,087-8,187llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
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+6,045-2clang/test/AST/ast-dump-templates.cpp
+3,676-1,531llvm/test/CodeGen/AArch64/neon-dotreduce.ll
+57,554-9,7205,758 files not shown
+304,226-135,9855,764 files

LLVM/project 5e48330clang/test/AST ast-dump-templates.cpp, llvm/test/CodeGen/AArch64 neon-dotreduce.ll

Rebase

Created using spr 1.3.5
DeltaFile
+3,087-8,187llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+6,045-2clang/test/AST/ast-dump-templates.cpp
+3,676-1,531llvm/test/CodeGen/AArch64/neon-dotreduce.ll
+2,548-2,578llvm/test/DebugInfo/NVPTX/debug-info.ll
+3,824-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vadd.ll
+30,162-12,2986,248 files not shown
+279,390-187,7066,254 files

LLVM/project 2f763c0clang/test/AST ast-dump-templates.cpp, libcxx/test/libcxx/containers/associative tree_remove.pass.cpp

Rebase on top of main

Created using spr 1.3.6-beta.1
DeltaFile
+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+6,045-2clang/test/AST/ast-dump-templates.cpp
+3,824-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vadd.ll
+3,412-0llvm/test/CodeGen/RISCV/GlobalISel/rotl-rotr.ll
+1,480-1,490libcxx/test/libcxx/containers/associative/tree_remove.pass.cpp
+2,885-51llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+28,628-1,5434,718 files not shown
+222,321-128,3564,724 files

LLVM/project 4615cceclang/test/AST ast-dump-templates.cpp, libcxx/test/libcxx/containers/associative tree_remove.pass.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+6,045-2clang/test/AST/ast-dump-templates.cpp
+3,824-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vadd.ll
+3,412-0llvm/test/CodeGen/RISCV/GlobalISel/rotl-rotr.ll
+1,480-1,490libcxx/test/libcxx/containers/associative/tree_remove.pass.cpp
+2,885-51llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+28,628-1,5434,718 files not shown
+222,321-128,3564,724 files

LLVM/project fe1b3e2clang/test/AST ast-dump-templates.cpp, libcxx/test/libcxx/containers/associative tree_remove.pass.cpp

Rebase on top of main

Created using spr 1.3.6-beta.1
DeltaFile
+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+6,045-2clang/test/AST/ast-dump-templates.cpp
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+3,412-0llvm/test/CodeGen/RISCV/GlobalISel/rotl-rotr.ll
+1,480-1,490libcxx/test/libcxx/containers/associative/tree_remove.pass.cpp
+2,885-51llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+28,628-1,5434,718 files not shown
+222,321-128,3564,724 files

LLVM/project 8c18c46clang/test/AST ast-dump-templates.cpp, libcxx/test/libcxx/containers/associative tree_remove.pass.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+6,045-2clang/test/AST/ast-dump-templates.cpp
+3,824-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vadd.ll
+3,412-0llvm/test/CodeGen/RISCV/GlobalISel/rotl-rotr.ll
+1,480-1,490libcxx/test/libcxx/containers/associative/tree_remove.pass.cpp
+2,885-51llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+28,628-1,5434,718 files not shown
+222,321-128,3564,724 files

LLVM/project 6883cbdclang/test/AST ast-dump-templates.cpp, libcxx/test/libcxx/containers/associative tree_remove.pass.cpp

Rebase on top of main

Created using spr 1.3.6-beta.1
DeltaFile
+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+6,045-2clang/test/AST/ast-dump-templates.cpp
+3,824-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vadd.ll
+3,412-0llvm/test/CodeGen/RISCV/GlobalISel/rotl-rotr.ll
+1,480-1,490libcxx/test/libcxx/containers/associative/tree_remove.pass.cpp
+2,885-51llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+28,628-1,5434,718 files not shown
+222,321-128,3564,724 files

LLVM/project cacf7fdclang/test/AST ast-dump-templates.cpp, libcxx/test/libcxx/containers/associative tree_remove.pass.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+6,045-2clang/test/AST/ast-dump-templates.cpp
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+3,412-0llvm/test/CodeGen/RISCV/GlobalISel/rotl-rotr.ll
+1,480-1,490libcxx/test/libcxx/containers/associative/tree_remove.pass.cpp
+2,885-51llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+28,628-1,5434,718 files not shown
+222,321-128,3564,724 files

LLVM/project c202534clang/test/AST ast-dump-templates.cpp, libcxx/test/libcxx/containers/associative tree_remove.pass.cpp

Rebase on top of main

Created using spr 1.3.6-beta.1
DeltaFile
+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+6,045-2clang/test/AST/ast-dump-templates.cpp
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+3,412-0llvm/test/CodeGen/RISCV/GlobalISel/rotl-rotr.ll
+1,480-1,490libcxx/test/libcxx/containers/associative/tree_remove.pass.cpp
+2,885-51llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+28,628-1,5434,718 files not shown
+222,321-128,3564,724 files

LLVM/project 5aad4baclang/test/AST ast-dump-templates.cpp, libcxx/test/libcxx/containers/associative tree_remove.pass.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+6,045-2clang/test/AST/ast-dump-templates.cpp
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+3,412-0llvm/test/CodeGen/RISCV/GlobalISel/rotl-rotr.ll
+1,480-1,490libcxx/test/libcxx/containers/associative/tree_remove.pass.cpp
+2,885-51llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+28,628-1,5434,718 files not shown
+222,321-128,3564,724 files

LLVM/project 0d5a309libcxx/test/libcxx/containers/associative tree_remove.pass.cpp tree_balance_after_insert.pass.cpp, llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions cl_khr_extended_bit_ops.ll

todo

Created using spr 1.3.4
DeltaFile
+1,480-1,490libcxx/test/libcxx/containers/associative/tree_remove.pass.cpp
+1,450-1,462libcxx/test/libcxx/containers/associative/tree_balance_after_insert.pass.cpp
+2,764-0llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions/cl_khr_extended_bit_ops.ll
+2,443-1mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
+38-2,387mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
+1,534-420llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
+9,709-5,7602,791 files not shown
+106,813-93,9292,797 files

LLVM/project fe55503clang/test/AST ast-dump-templates.cpp, llvm/test/CodeGen/AArch64 neon-dotreduce.ll

rebase

Created using spr 1.3.4
DeltaFile
+3,087-8,187llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+6,045-2clang/test/AST/ast-dump-templates.cpp
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+3,412-0llvm/test/CodeGen/RISCV/GlobalISel/rotl-rotr.ll
+31,026-9,7205,441 files not shown
+249,931-173,6435,447 files

LLVM/project 176d034llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

Merge branch 'main' into users/zhaoqi5/opt-tlsle-mergebaseoffset
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
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+164,956-011,933 files not shown
+1,646,795-356,29711,939 files

LLVM/project 4e096e9lldb/tools/lldb-dap package-lock.json, llvm/test/CodeGen/RISCV/GlobalISel wide-scalar-shift-by-byte-multiple-legalization.ll rotl-rotr.ll

merge with main, and resolve code review comments
DeltaFile
+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+3,824-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vadd.ll
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+1,644-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcvt.ll
+24,289-380855 files not shown
+50,895-10,137861 files

LLVM/project ef1ce8aclang/test/AST ast-dump-templates.cpp, llvm/test/CodeGen/AArch64 neon-dotreduce.ll

fix
DeltaFile
+20,021-0llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
+13,743-0llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
+3,087-8,187llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
+10,982-0llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+6,045-2clang/test/AST/ast-dump-templates.cpp
+3,676-1,531llvm/test/CodeGen/AArch64/neon-dotreduce.ll
+57,554-9,7204,608 files not shown
+229,750-108,7674,614 files

LLVM/project 6ca65f0llvm/test/CodeGen/RISCV push-pop-popret.ll, llvm/test/CodeGen/X86 isel-fcmp-x87.ll isel-fcmp.ll

Merge branch 'users/meinersbur/flang_runtime_shared' into users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME
DeltaFile
+2,401-1mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
+20-2,369mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
+1,496-0llvm/test/CodeGen/X86/isel-fcmp-x87.ll
+508-516llvm/test/CodeGen/RISCV/push-pop-popret.ll
+888-0llvm/test/CodeGen/X86/isel-fcmp.ll
+160-355llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
+5,473-3,241203 files not shown
+10,249-5,954209 files

LLVM/project 6f42d31llvm/test/CodeGen/RISCV push-pop-popret.ll, llvm/test/CodeGen/X86 isel-fcmp-x87.ll isel-fcmp.ll

Merge branch 'users/meinersbur/flang_runtime' into users/meinersbur/flang_runtime_shared
DeltaFile
+2,401-1mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
+20-2,369mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
+1,496-0llvm/test/CodeGen/X86/isel-fcmp-x87.ll
+508-516llvm/test/CodeGen/RISCV/push-pop-popret.ll
+888-0llvm/test/CodeGen/X86/isel-fcmp.ll
+160-355llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
+5,473-3,241203 files not shown
+10,249-5,954209 files