[clang] Use `cwg_index.html` from GitHub for DR status page (#90352)
Currently we're using official publication of CWG issue list available
at https://www.open-std.org/jtc1/sc22/wg21/docs/cwg_index.html.
Unfortunately, it's not updated as frequently as we sometimes need. For
instance, recently there was a confusion during review of CWG2149 test
(https://github.com/llvm/llvm-project/pull/90079#discussion_r1580174003).
This patch changes our `make_cxx_dr_status` script to use issue list
from CWG GitHub repository. I confirmed with CWG chair that this is the
most up-to-date source of information on CWG issues.
Changing the source of issue list uncovered previously unhandled
"tentatively ready" status of an issue. This status is considered
unresolved by the script (like `open`, `drafting`, and `review`), as the
resolution might change during face-to-face CWG meeting.
I also noticed that CWG decided to handle 2561 differently from what
we're doing, so this DR is now considered not available in Clang,
despite being declared as available since 18. CC @cor3ntin.
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[AMDGPU] Fix hard clausing for image instructions on gfx12 (#90221)
Also updated hard-clauses.mir to have separate versions for gfx11 and
gfx12 since
the MIR instructions are different for each of them.
[SemaCXX] Recognise initializer_list injected-class-name types as initializer_lists (#90210)
This allows the implicitly-generated deduction guide for the copy
constructor to be recognised as an initializer-list constructor,
allowing CTAD for std::initializer_list
Revert "[flang] Improve debug info for functions." (#90444)
Reverts llvm/llvm-project#90083 due to a test suite failure:
https://lab.llvm.org/buildbot/#/builders/184/builds/11961
```
flang-new: ../llvm/mlir/lib/IR/Types.cpp:126: unsigned int mlir::Type::getIntOrFloatBitWidth() const: Assertion `isIntOrFloat() && "only integers and floats have a bitwidth"' failed.
```
[libc++][NFC] Refactor __libcpp_datasizeof to be a variable template (#87769)
This decreases memory consumption and compiles times slightly and
removes a bit of boilderplate.
Move several vector intrinsics out of experimental namespace (#88748)
This patch is moving out following intrinsics:
* vector.interleave2/deinterleave2
* vector.reverse
* vector.splice
from the experimental namespace.
All these intrinsics exist in LLVM for more than a year now, and are
widely used, so should not be considered as experimental.
Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more...
This reverts:
b3c55b707110084a9f50a16aade34c3be6fa18da - "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)"
(because it updates a test case that I don't know how to resolve the conflict for)
8e2f6495c0bac1dd6ee32b6a0d24152c9c343624 - "[DAGCombiner] Do not always fold FREEZE over BUILD_VECTOR (#85932)"
73472c5996716cda0dbb3ddb788304e0e7e6a323 - "[SelectionDAG] Treat CopyFromReg as freezing the value (#85932)"
Due to a test suite failure on AArch64 when compiling for SVE.
https://lab.llvm.org/buildbot/#/builders/197/builds/13955
clang: ../llvm/llvm/include/llvm/CodeGen/ValueTypes.h:307: MVT llvm::EVT::getSimpleVT() const: Assertion `isSimple() && "Expected a SimpleValueType!"' failed.
[flang] Improve debug info for functions. (#90083)
This PR improves the debug information for functions in the following
ways:
1. Get line number information from FuncOp and remove hard-coded line
numbers.
2. Use proper type for function signature. I have a added a type
converter. Currently, it is very limited but will be enhanced with time.
3. Use de-constructed function name.
[lldb[Docs] Reduce title noise in packets doc (#90183)
This removes the "Brief" and "Description" subtitles and merges the text
of both so that the contents listing is clearer.
[llvm-mca] Add -skip-unsupported-instructions option (#89733)
Prior to this patch, if llvm-mca encountered an instruction which parses
but has no scheduler info, the instruction is always reported as
unsupported, and llvm-mca halts with an error.
However, it would still be useful to allow MCA to continue even in the
case of instructions lacking scheduling information. Obviously if
scheduling information is lacking, it's not possible to give an accurate
analysis for those instructions, and therefore a warning is emitted.
A user could previously have worked around such unsupported instructions
manually by deleting such instructions from the input, but this provides
them a way of doing this for bulk inputs where they may not have a list
of such unsupported instructions to drop up front.
Note that this behaviour of instructions with no scheduling information
under -skip-unsupported-instructions is analagous to current
instructions which fail to parse: those are currently dropped from the
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[Legalizer] Expand fmaximum and fminimum (#67301)
According to langref, llvm.maximum/minimum has -0.0 < +0.0 semantics and
propagates NaN.
Expand the nodes on targets not supporting the operation, by adding
extra check for NaN and using is_fpclass to check zero signs.
[RISCV] Don't use MachineInstr::isIdenticalTo in hasSameAVL (#90431)
MachineInstr::isIdenticalTo compares that the operands and flags are the
same IIUC, but I think we actually want to check that it's the same
MachineInstr * with respect to position in the block etc.
Improve documented sampling profiler steps to best known methods (#88438)
1. Add `-fdebug-info-for-profiling -funique-internal-linkage-names`,
which improve the usefulness of debug info for profiling.
2. Recommend the use of `br_inst_retired.near_taken:uppp`, which
provides the most precise results on supporting hardware. Mention
`branches:u` as a more portable backup.
Both should portray execution counts better than the default event
(`cycles`) and have a better chance of working as an unprivileged user
due to the `:u` modifier.